Processing

Please wait...

Settings

Settings

Goto Application

1. WO2012135363 - INTEGRATED CIRCUIT HAVING CHEMICALLY MODIFIED SPACER SURFACE

Publication Number WO/2012/135363
Publication Date 04.10.2012
International Application No. PCT/US2012/030977
International Filing Date 28.03.2012
IPC
H01L 21/336 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
H01L 29/78 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
CPC
H01L 21/0217
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02109characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
02112characterised by the material of the layer
02123the material containing silicon
0217the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
H01L 21/02321
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02296characterised by the treatment performed before or after the formation of the layer
02318post-treatment
02321introduction of substances into an already existing insulating layer
H01L 21/02337
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02296characterised by the treatment performed before or after the formation of the layer
02318post-treatment
02337treatment by exposure to a gas or vapour
H01L 21/3105
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques
3105After-treatment
H01L 21/823864
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823864with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
H01L 29/665
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
665using self aligned silicidation, i.e. salicide
Applicants
  • TEXAS INSTRUMENTS INCORPORATED [US]/[US] (AllExceptUS)
  • TEXAS INSTRUMENTS JAPAN LIMITED [JP]/[JP] (JP)
  • KIRKPATRICK, Brian, K. [US]/[US] (UsOnly)
  • JAIN, Amitabh [US]/[US] (UsOnly)
Inventors
  • KIRKPATRICK, Brian, K.
  • JAIN, Amitabh
Agents
  • FRANZ, Warren, L.
Priority Data
13/427,06222.03.2012US
61/468,30828.03.2011US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) INTEGRATED CIRCUIT HAVING CHEMICALLY MODIFIED SPACER SURFACE
(FR) CIRCUIT INTÉGRÉ COMPORTANT UNE SURFACE D'ENTRETOISE MODIFIÉE CHIMIQUEMENT
Abstract
(EN)
A method (100) of fabricating an integrated circuit includes depositing (101) a first dielectric material onto a semiconductor surface of a substrate having a gate stack thereon including a gate electrode on a gate dielectric. The first dielectric material is etched (102) to form sidewall spacers on sidewalls of the gate stack. A top surface of the first dielectric material is chemically converted (103) to a second dielectric material by adding at least one element to provide surface converted sidewall spacers. The second dielectric material is chemically bonded across a transition region to the first dielectric material.
(FR)
L'invention concerne un procédé (100) de fabrication d'un circuit intégré qui consiste à déposer (101) un premier matériau diélectrique sur une surface semi-conductrice d'un substrat recouvert d'un empilement de grille comprenant une électrode de grille sur un diélectrique de grille. Le premier matériau diélectrique est gravé (102) pour former des entretoises latérales sur les parois latérales de l'empilement de grille. La surface supérieure du premier matériau diélectrique est transformée chimiquement (103) en un deuxième matériau diélectrique en ajoutant au moins un élément pour obtenir des entretoises latérales à surface transformée. Le deuxième matériau diélectrique est lié chimiquement à travers une région de transition au premier matériau diélectrique.
Also published as
Latest bibliographic data on file with the International Bureau