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1. WO2012133380 - CIRCUIT BOARD, AND METHOD FOR MANUFACTURING CIRCUIT BOARD

Publication Number WO/2012/133380
Publication Date 04.10.2012
International Application No. PCT/JP2012/057883
International Filing Date 27.03.2012
IPC
H05K 1/02 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
H05K 1/11 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
11Printed elements for providing electric connections to or between printed circuits
H05K 3/06 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
02in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
06the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
CPC
H01L 2224/16245
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16245the item being metallic
H01L 23/49827
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements
488consisting of soldered ; or bonded; constructions
498Leads, ; i.e. metallisations or lead-frames; on insulating substrates, ; e.g. chip carriers
49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
H01L 23/49861
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements
488consisting of soldered ; or bonded; constructions
498Leads, ; i.e. metallisations or lead-frames; on insulating substrates, ; e.g. chip carriers
49861Lead-frames fixed on or encapsulated in insulating substrates
H01L 2924/13091
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
10Details of semiconductor or other solid state devices to be connected
11Device type
13Discrete devices, e.g. 3 terminal devices
1304Transistor
1306Field-effect transistor [FET]
13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
H05K 1/0263
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
0213Electrical arrangements not otherwise provided for
0263High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
H05K 1/0265
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
0213Electrical arrangements not otherwise provided for
0263High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
0265characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
Applicants
  • 株式会社村田製作所 Murata Manufacturing Co., Ltd. [JP]/[JP] (AllExceptUS)
  • 守屋要一 MORIYA, Yoichi [JP]/[JP] (UsOnly)
  • 伊藤悟志 ITO, Satoshi [JP]/[JP] (UsOnly)
  • 金森哲雄 KANAMORI, Tetsuo [JP]/[JP] (UsOnly)
  • 八木幸弘 YAGI, Yukihiro [JP]/[JP] (UsOnly)
  • 山本祐樹 YAMAMOTO, Yuki [JP]/[JP] (UsOnly)
Inventors
  • 守屋要一 MORIYA, Yoichi
  • 伊藤悟志 ITO, Satoshi
  • 金森哲雄 KANAMORI, Tetsuo
  • 八木幸弘 YAGI, Yukihiro
  • 山本祐樹 YAMAMOTO, Yuki
Agents
  • 特許業務法人 楓国際特許事務所 Kaede Patent Attorneys' Office
Priority Data
2011-06909428.03.2011JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) CIRCUIT BOARD, AND METHOD FOR MANUFACTURING CIRCUIT BOARD
(FR) CARTE À CIRCUIT ET SON PROCÉDÉ DE FABRICATION
(JA) 回路基板及び回路基板の製造方法
Abstract
(EN)
A circuit board (1) is provided with an insulating layer (2), which has a semiconductor element (10) mounted on a surface, and wiring sections (31, 32, 33), which are provided on the insulating layer (2). The wiring sections (31, 32, 33) are configured of upper wiring sections (311, 321, 331), lower wiring sections (312, 322, 332), and interlayer connecting sections (313, 323, 333). The upper wiring sections (311, 321, 331), lower wiring sections (312, 322, 332), and interlayer connecting sections (313, 323, 333) are integrally formed of one copper plate. Consequently, the circuit board applicable to a large current and a method for manufacturing the circuit board are provided.
(FR)
L'invention concerne une carte à circuit (1) qui comporte : une plaque d'isolation (2) sur une surface de laquelle un élément semi-conducteur (10) est installé, et des sections de circuits imprimés (31, 32, 33) placées sur la couche isolante (2). Les sections de circuits imprimés (31, 32, 33) sont configurées en sections de circuits imprimés supérieures (311, 321, 331), sections de circuits imprimés inférieures (312, 322, 332) et sections de connexion intercouche (313, 323, 333). Les sections de circuits imprimés supérieures (311, 321, 331), sections de circuits imprimés inférieures (312, 322, 332) et sections de connexion intercouche (313, 323, 333) sont formées d'un seul bloc sur une plaque de cuivre. L'invention concerne ainsi ladite carte à circuit qui peut être appliquée à un courant élevé et son procédé de fabrication.
(JA)
回路基板(1)は、表面に半導体素子(10)が実装される絶縁層(2)と、絶縁層(2)に設けられた配線部(31,32,33)とを備えている。配線部(31,32,33)は、上側配線部(311,321,331)、下側配線(312,322,332)、および層間接続部(313,323,333)から構成されている。上側配線部(311,321,331)、下側配線部(312,322,332)、および層間接続部(313,323,333)は、一つの銅板から一体形成されている。これにより、大電流に対応可能な回路基板及びその製造方法を提供する。
Also published as
Latest bibliographic data on file with the International Bureau