WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO2012116157) CHIP MODULE EMBEDDED IN PCB SUBSTRATE
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2012/116157    International Application No.:    PCT/US2012/026284
Publication Date: 30.08.2012 International Filing Date: 23.02.2012
IPC:
H01L 23/12 (2006.01), H01L 21/60 (2006.01), H05K 3/46 (2006.01)
Applicants: TEXAS INSTRUMENTS INCORPORATED [US/US]; P.O. Box 655474, Mail Station 3999 Dallas, TX 75265-5474 (US) (AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BE, BF, BG, BH, BJ, BR, BW, BY, BZ, CA, CF, CG, CH, CI, CL, CM, CN, CO, CR, CU, CY, CZ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, FR, GA, GB, GD, GE, GH, GM, GN, GQ, GR, GT, GW, HN, HR, HU, ID, IE, IL, IN, IS, IT, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MC, MD, ME, MG, MK, ML, MN, MR, MT, MW, MX, MY, MZ, NA, NE, NG, NI, NL, NO, NZ, OM, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SI, SK, SL, SM, SN, ST, SV, SY, SZ, TD, TG, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, UZ, VC, VN, ZA, ZM, ZW only).
TEXAS INSTRUMENTS DEUTSCHLAND GMBH [DE/DE]; Haggertystrasse 1 85356 Freising (DE) (DE only).
TEXAS INSTRUMENTS JAPAN LIMITED [JP/JP]; 24-1, Nishi-shinjuku 6-chome Shinjuku-ku Tokyo, 160-8366 (JP) (JP only).
LANGE, Bernhard [DE/DE]; (DE) (For US Only).
PUCHERT, Thies [DE/DE]; (DE) (For US Only)
Inventors: LANGE, Bernhard; (DE).
PUCHERT, Thies; (DE)
Agent: FRANZ, Warren, L.; Texas Instruments Incorporated Deputy General Patent Counsel P.O. Box 655474, Mail Station 3999 Dallas, TX 75265-5474 (US)
Priority Data:
102011012186.2 23.02.2011 DE
13/366,607 06.02.2012 US
Title (EN) CHIP MODULE EMBEDDED IN PCB SUBSTRATE
(FR) MODULE DE PUCE INCORPORÉ DANS UN SUBSTRAT DE CARTE DE CIRCUIT IMPRIMÉ
Abstract: front page image
(EN)A semiconductor device is described comprising a semiconductor die 2 that is embedded in a package, wherein the die has a front side 28 comprising a plurality of pads to be bonded to terminals of the package, and wherein a backside 16 of the die is coupled to a backside surface 29 of the package by a thermal bridge.
(FR)L'invention porte sur un dispositif à semi-conducteurs comportant une puce semi-conductrice 2 qui est incorporée dans un boîtier, la puce ayant un côté avant 28 comportant une pluralité de plages de connexion devant être liées à des bornes du boîtier, un côté arrière 16 de la puce étant couplé à une surface côté arrière 29 du boîtier par un pont thermique.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)