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1. WO2012109438 - SEED LAYER PASSIVATION

Publication Number WO/2012/109438
Publication Date 16.08.2012
International Application No. PCT/US2012/024471
International Filing Date 09.02.2012
IPC
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
314
Inorganic layers
316
composed of oxides or glassy oxides or oxide-based glass
H01L 21/28 (2006.01)
H01L 21/316 (2006.01)
CPC
H01L 21/321
H01L 21/67353
H01L 21/67393
H01L 21/76831
H01L 21/76856
H01L 21/76864
Applicants
  • APPLIED MATERIALS, INC. [US/US]; 3050 Bowers Avenue P.o. Box 58039 Santa Clara, CA 95054-3299, US (AllExceptUS)
  • SCHIEFFER, Callie, A. [US/US]; US (UsOnly)
  • EMESH, Ismail, T. [US/US]; US (UsOnly)
Inventors
  • SCHIEFFER, Callie, A.; US
  • EMESH, Ismail, T.; US
Agents
  • PEYSER, Emily, C.; Christensen O'connor Johnson Kindness Pllc 1420 Fifth Avenue, Suite 2800 Seattle, WA 98101, US
Priority Data
13/025,09810.02.2011US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SEED LAYER PASSIVATION
(FR) PASSIVATION DE COUCHE DE GERMINATION
Abstract
(EN)
A method of processing a microfeature workpiece generally includes depositing a first conducting layer, at least partially reducing oxides on the first conducting layer to provide a reduced first conducting layer, and exposing the reduced first conducting layer to a substantially oxygen-free environment to provide a passivated first conducting layer. A microfeature workpiece generally includes a first conducting layer, a monolayer directly on the first conducting layer, and a second conducting layer.
(FR)
L'invention porte sur un procédé de traitement d'une pièce à travailler à microtraits qui comprend généralement le dépôt d'une première couche conductrice, la réduction au moins partielle d'oxydes sur la première couche conductrice pour fournir une première couche conductrice réduite, et l'exposition de la première couche conductrice réduite à un environnement sensiblement exempt d'oxygène pour fournir une première couche conductrice passivée. Une pièce à travailler à microtraits comprend généralement une première couche conductrice, une monocouche directement sur la première couche conductrice et une seconde couche conductrice.
Also published as
Latest bibliographic data on file with the International Bureau