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1. (WO2012090819) METHOD FOR MANUFACTURING MICROCRYSTALLINE SILICON FILM, MICROCRYSTALLINE SILICON FILM, ELECTRIC ELEMENT, AND DISPLAY DEVICE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2012/090819 International Application No.: PCT/JP2011/079642
Publication Date: 05.07.2012 International Filing Date: 21.12.2011
IPC:
H01L 21/205 (2006.01) ,B82Y 40/00 (2011.01) ,H01L 21/336 (2006.01) ,H01L 29/786 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
205
using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
B PERFORMING OPERATIONS; TRANSPORTING
82
NANO-TECHNOLOGY
Y
SPECIFIC USES OR APPLICATIONS OF NANO-STRUCTURES; MEASUREMENT OR ANALYSIS OF NANO-STRUCTURES; MANUFACTURE  OR TREATMENT OF NANO-STRUCTURES
40
Manufacture or treatment of nano-structures
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
Applicants: MIYAZAKI, Atsushi; null (UsOnly)
SHARP KABUSHIKI KAISHA[JP/JP]; 22-22, Nagaike-cho, Abeno-ku, Osaka-shi, Osaka 5458522, JP (AllExceptUS)
Inventors: MIYAZAKI, Atsushi; null
Agent: Fukami Patent Office, p.c.; Nakanoshima Central Tower, 2-7, Nakanoshima 2-chome, Kita-ku, Osaka-shi, Osaka 5300005, JP
Priority Data:
2010-29278028.12.2010JP
Title (EN) METHOD FOR MANUFACTURING MICROCRYSTALLINE SILICON FILM, MICROCRYSTALLINE SILICON FILM, ELECTRIC ELEMENT, AND DISPLAY DEVICE
(FR) PROCÉDÉ DE FABRICATION D'UN FILM DE SILICIUM MICROCRISTALLIN, FILM DE SILICIUM MICROCRISTALLIN, ÉLÉMENT ÉLECTRIQUE, ET DISPOSITIF D'AFFICHAGE
(JA) 微結晶シリコン膜の製造方法、微結晶シリコン膜、電気素子および表示装置
Abstract:
(EN) Disclosed is a method for manufacturing a crystalline silicon film, which is provided with: a step of preparing a substrate (1) having the main surface; a step of forming an amorphous film (2) on the main surface; and a step of exposing, in an atmosphere having no electrical field applied thereto, the substrate having the amorphous film (2) formed thereon to a gas atmosphere of a first silicon compound containing silicon element and hydrogen element as main components.
(FR) La présente invention concerne un procédé de fabrication d'un film de silicium cristallin, comprenant les étapes consistant à : préparer un substrat (1) comportant la surface principale ; former un film amorphe (2) sur la surface principale ; et exposer, dans une atmosphère où aucun champ électrique n'est appliqué, le substrat comportant formé sur lui le film amorphe (2) à une atmosphère gazeuse d'un premier composé de silicium contenant des éléments de silicium et d'hydrogène comme principaux composants.
(JA)  結晶シリコン膜の製造方法は、主表面を有する基板(1)を準備する工程と、主表面上に、アモルファス膜(2)を形成する工程と、電界が加えられていない雰囲気中において、アモルファス膜(2)が形成された基板を、シリコン元素と水素元素とを主成分として含む第1シリコン化合物のガス雰囲気にさらす工程とを備える。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)