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1. WO2012078225 - STRUCTURE AND METHOD FOR Vt TUNING AND SHORT CHANNEL CONTROL WITH HIGH K/METAL GATE MOSFETs

Publication Number WO/2012/078225
Publication Date 14.06.2012
International Application No. PCT/US2011/051675
International Filing Date 15.09.2011
IPC
H01L 29/78 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
H01L 21/336 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
CPC
H01L 21/823807
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823807with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
H01L 21/823892
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823892with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
H01L 29/1041
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
10with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
1025Channel region of field-effect devices
1029of field-effect transistors
1033with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
1041with a non-uniform doping structure in the channel region surface
Applicants
  • INTERNATIONAL BUSINESS MACHINES CORPORATION [US]/[US] (AllExceptUS)
  • WANG, Xinlin [CN]/[US] (UsOnly)
  • CHEN, Xiangdong [CN]/[US] (UsOnly)
  • CAI, Jin [CN]/[US] (UsOnly)
Inventors
  • WANG, Xinlin
  • CHEN, Xiangdong
  • CAI, Jin
Agents
  • SCHNURMANN, H., Daniel
Priority Data
12/960,58906.12.2010US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) STRUCTURE AND METHOD FOR Vt TUNING AND SHORT CHANNEL CONTROL WITH HIGH K/METAL GATE MOSFETs
(FR) STRUCTURE ET PROCÉDÉ PERMETTANT UN RÉGLAGE DE VT ET UNE COMMANDE DE CANAL COURT AVEC DES TRANSISTORS MÉTAL-OXYDE À EFFET DE CHAMP (MOSFET) À GRILLE MÉTALLIQUE À FORTE PERMITTIVITÉ
Abstract
(EN)
A semiconductor device is provided that includes a semiconductor substrate (12) having a well region 12B located within an upper region thereof. A semiconductor material stack (14) is located on the well region. The semiconductor material stack includes, from bottom to top, a semiconductor-containing buffer layer (15) and a non-doped semiconductor-containing channel layer (16); the semiconductor-containing buffer layer of the semiconductor material stack is located directly on an upper surface of the well region. The structure also includes a gate material stack (18) located directly on an upper surface of the non-doped semiconductor-containing channel layer. The gate material stack employed in the present disclosure includes, from bottom to top, a high k gate dielectric layer 20, a work function metal layer (22) and a polysilicon layer (24).
(FR)
La présente invention se rapporte à un dispositif semi-conducteur qui comprend un substrat semi-conducteur (12) dans une région supérieure duquel se trouve une région de puits (12B). Un empilement de matériaux semi-conducteurs (14) est agencé sur la région de puits. L'empilement de matériaux semi-conducteurs comprend, du bas vers le haut, une couche tampon contenant des semi-conducteurs (15) et une couche de canal contenant des semi-conducteurs non dopés (16), la couche tampon contenant des semi-conducteurs de l'empilement de matériaux semi-conducteurs étant agencée directement sur une surface supérieure de la région de puits. La structure comprend également un empilement de matériaux de grille (18) agencé directement sur une surface supérieure de la couche de canal contenant des semi-conducteurs non dopés. L'empilement de matériaux de grille utilisé dans la présente invention comprend, du bas vers le haut, une couche diélectrique de grille à forte permittivité (20), une couche métallique de travail d'extraction (22) et une couche de polysilicium (24).
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