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1. WO2012068797 - SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Publication Number WO/2012/068797
Publication Date 31.05.2012
International Application No. PCT/CN2011/071460
International Filing Date 02.03.2011
IPC
H01L 29/78 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
H01L 21/336 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
CPC
H01L 29/1083
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
10with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
107Substrate region of field-effect devices
1075of field-effect transistors
1079with insulated gate
1083with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
H01L 29/6656
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
6656using multiple spacer layers, e.g. multiple sidewall spacers
H01L 29/66636
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
66568Lateral single gate silicon transistors
66636with source or drain recessed by etching or first recessed by etching and then refilled
H01L 29/78
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
Applicants
  • 中国科学院微电子研究所 INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES [CN]/[CN] (AllExceptUS)
  • 骆志炯 LUO, Zhijiong [CN]/[US] (UsOnly)
  • 尹海洲 YIN, Haizhou [CN]/[US] (UsOnly)
  • 朱慧珑 ZHU, Huilong [US]/[US] (UsOnly)
Inventors
  • 骆志炯 LUO, Zhijiong
  • 尹海洲 YIN, Haizhou
  • 朱慧珑 ZHU, Huilong
Agents
  • 中科专利商标代理有限责任公司 CHINA SCIENCE PATENT & TRADEMARK AGENT LTD.
Priority Data
201010557270.422.11.2010CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET PROCÉDÉ DE FABRICATION DUDIT DISPOSITIF
(ZH) 一种半导体器件及其形成方法
Abstract
(EN)
A semiconductor device and a manufacturing method thereof are provided. The semiconductor device is formed on a semiconductor substrate (200), the semiconductor device comprises a gate stack, a channel region (201) and source/drain regions (218). The gate stack is formed on the channel region (201), the channel region (201) is disposed in the semiconductor substrate (200), the source/drain regions (218) are embedded in the semiconductor substrate (200). The source/drain regions (218) comprise sidewalls and bottom walls, second semiconductor layers (224) are sandwiched between portions of the sidewalls which are away from the bottom walls and the channel region (201). The portions of bottom walls which are at least away from the sidewalls are connected to the semiconductor substrate (200) via first semiconductor layers (214). The residual portions of the bottom walls and/or the sidewalls are connected to the semiconductor substrate (200) via insulating layers (220). The manufacturing method of the semiconductor device is facilitated to reduce doped ions in the source/drain regions (218) to diffuse into the semiconductor substrate (200).
(FR)
La présente invention concerne un dispositif à semi-conducteur et un procédé de fabrication dudit dispositif. Ce dispositif à semi-conducteur est formé sur un substrat semi-conducteur (200) et comporte un empilement de grilles, une zone canal (201) et des zones source / drain (218). L'empilement de grilles est formé sur la zone canal (201), la zone canal (201) est située dans le substrat semi-conducteur (200), les zones source / drain (218) sont encastrées dans le substrat semi-conducteur (200). Les zones source / drain (218) comportent des parois latérales et des parois de fond, des secondes couches semi-conductrices (224) sont placées en sandwich entre des parties des parois latérales qui sont éloignées des parois de fond et la zone canal (201). Les parties des parois de fond qui sont au moins éloignées des parois latérales sont connectées au substrat semi-conducteur (200) via des premières couches semi-conductrices (214). Les parties restantes des parois de fond et / ou des parois latérales sont connectées au substrat semi-conducteur (200) par l'intermédiaire de couches isolantes (220). Le procédé de fabrication du dispositif à semi-conducteur selon la présente invention permet de réduire la quantité d'ions dopés dans les zones source / drain (218) qui se propagent dans le substrat semi-conducteur (200).
Also published as
Latest bibliographic data on file with the International Bureau