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1. WO2012060114 - DRAWING DEVICE AND DRAWING METHOD

Publication Number WO/2012/060114
Publication Date 10.05.2012
International Application No. PCT/JP2011/051667
International Filing Date 27.01.2011
IPC
G09G 5/39 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
39Control of the bit-mapped memory
G09G 3/20 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
G09G 5/00 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
G09G 5/393 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
39Control of the bit-mapped memory
393Arrangements for updating the contents of the bit-mapped memory
CPC
G09G 2360/127
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2360Aspects of the architecture of display systems
12Frame memory handling
127Updating a frame memory using a transfer of data from a source area to a destination area
G09G 3/3611
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix ; no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
34by control of light from an independent source
36using liquid crystals
3611Control of matrices with row and column drivers
G09G 5/393
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
39Control of the bit-mapped memory
393Arrangements for updating the contents of the bit-mapped memory
Applicants
  • 三菱電機株式会社 Mitsubishi Electric Corporation [JP]/[JP] (AllExceptUS)
  • 中田 成憲 NAKATA Masanori (UsOnly)
  • 久代 紀之 KUSHIRO Noriyuki (UsOnly)
  • 勝倉 真 KATSUKURA Makoto (UsOnly)
  • 小泉 吉秋 KOIZUMI Yoshiaki (UsOnly)
Inventors
  • 中田 成憲 NAKATA Masanori
  • 久代 紀之 KUSHIRO Noriyuki
  • 勝倉 真 KATSUKURA Makoto
  • 小泉 吉秋 KOIZUMI Yoshiaki
Agents
  • 木村 満 KIMURA Mitsuru
Priority Data
2010-24574301.11.2010JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) DRAWING DEVICE AND DRAWING METHOD
(FR) DISPOSITIF DE DESSIN ET PROCÉDÉ DE DESSIN
(JA) 描画装置及び描画方法
Abstract
(EN)
A DMA controller (13A) operates independently from a CPU (10), reads image data recorded in an ROM (11) by prescribed unit successively from a front reading start position, and writes the same in a buffer (30). A DMA controller (13B) operates independently from the CPU (10), and writes the data read to the buffer (30) one byte at a time successively in a horizontal direction from a VRAM (15) writing start position. A control unit (31) of a companion chip (3) updates the VRAM (15) writing start position to the same sequence position in the next row each time that the writing of the data sequence for each row is completed.
(FR)
Selon l'invention, une unité de commande DMA (13A) fonctionne indépendamment d'une UCT (10), lit des données d'image enregistrées dans une ROM (11) selon une unité prédéfinie successivement depuis une position de début de lecture avant, et les enregistre dans un tampon (30). Une unité de commande DMA (13B) fonctionne indépendamment de l'UCT (10), et écrit les données lues dans le tampon (30) un octet à la fois successivement dans une direction horizontale depuis une position de début d'écriture de VRAM (15). Une unité de commande (31) d'une puce de comparaison (3) met à jour la position de début d'écriture de VRAM (15) à la même position de séquence dans la rangée suivante chaque fois que l'écriture de la séquence de données pour chaque rangée est terminée.
(JA)
 DMAコントローラ(13A)は、CPU(10)とは独立して動作し、ROM(11)に記憶された画像データを、その先頭の読み出し開始位置から所定の単位で順次読み出してバッファ(30)に書き込んで行く。DMAコントローラ(13B)は、CPU(10)とは独立して動作し、バッファ(30)に読み出されたデータを、VRAM(15)における書き込み開始位置から1バイトずつ横方向に順次書き込んでいく。コンパニオンチップ(3)の制御部(31)は、各行のデータ列の書き込みが完了する度に、VRAM(15)における書き込み開始位置を、次の行の同じ列の位置に更新する。
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