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1. WO2012056615 - SEMICONDUCTOR DEVICE

Publication Number WO/2012/056615
Publication Date 03.05.2012
International Application No. PCT/JP2011/004147
International Filing Date 22.07.2011
IPC
H01L 21/82 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
H01L 21/3205 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
H01L 21/822 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
H01L 21/8238 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology
8238Complementary field-effect transistors, e.g. CMOS
H01L 23/52 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
H01L 27/04 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
CPC
H01L 2027/11829
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
118Masterslice integrated circuits
11803using field effect technology
11807CMOS gate arrays
11809Microarchitecture
11829Isolation techniques
H01L 2027/11861
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
118Masterslice integrated circuits
11803using field effect technology
11807CMOS gate arrays
11809Microarchitecture
11859Connectibility characteristics, i.e. diffusion and polysilicon geometries
11861Substrate and well contacts
H01L 2027/11866
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
118Masterslice integrated circuits
11803using field effect technology
11807CMOS gate arrays
11809Microarchitecture
11859Connectibility characteristics, i.e. diffusion and polysilicon geometries
11866Gate electrode terminals or contacts
H01L 2027/11875
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
118Masterslice integrated circuits
11803using field effect technology
11807CMOS gate arrays
11868Macro-architecture
11874Layout specification, i.e. inner core region
11875Wiring region, routing
H01L 21/76895
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76838characterised by the formation and the after-treatment of the conductors
76895Local interconnects; Local pads, as exemplified by patent document EP0896365
H01L 23/485
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements
482consisting of lead-in layers inseparably applied to the semiconductor body
485consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
Applicants
  • パナソニック株式会社 PANASONIC CORPORATION [JP]/[JP] (AllExceptUS)
  • 田丸 雅規 TAMARU, Masaki (UsOnly)
Inventors
  • 田丸 雅規 TAMARU, Masaki
Agents
  • 前田 弘 MAEDA, Hiroshi
Priority Data
2010-23999726.10.2010JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE
(FR) DISPOSITIF SEMI-CONDUCTEUR
(JA) 半導体装置
Abstract
(EN)
Local wiring (12) is formed in contact with the upper surface of an impurity diffusion region (11), and extends to below potential feed wiring (13). The local wiring (12) and the potential feed wiring (13) are electrically connected via a contact hole (14a). Namely, the local wiring (12) formed in contact with the upper surface of the impurity diffusion region is used for the purpose of electrical connection from the impurity diffusion region (11) to the potential feed wiring (13).
(FR)
Selon l'invention, un conducteur local (12) est formé au contact de la surface supérieure d'une région de diffusion d'impuretés (11) et s'étend au-dessous d'un conducteur d'alimentation de potentiel (13). Le conducteur local (12) et le conducteur d'alimentation de potentiel (13) sont connectés électriquement par un trou de contact (14a). Plus précisément, le conducteur local (12) formé au contact de la surface supérieure de la région de diffusion d'impuretés est utilisé pour réaliser la connexion électrique entre la région de diffusion d'impuretés (11) et le conducteur d'alimentation de potentiel (13).
(JA)
 ローカル配線(12)が、不純物拡散領域(11)上面に接して形成されており、電位給電配線(13)の下まで延びている。そして、コンタクトホール(14a)によって、ローカル配線(12)と電位給電配線(13)とが電気的に接続されている。すなわち、不純物拡散領域(11)から電位給電配線(13)までの電気的接続のために、不純物拡散領域上面に接して形成されたローカル配線(12)が用いられている。
Also published as
Latest bibliographic data on file with the International Bureau