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1. (WO2012051023) DELAY LOCKED LOOP INCLUDING A MECHANISM FOR REDUCING LOCK TIME

Pub. No.:    WO/2012/051023    International Application No.:    PCT/US2011/054972
Publication Date: Apr 19, 2012 International Filing Date: Oct 5, 2011
IPC: H03L 7/00
Applicants: APPLE INC.
TRIVEDI, Pradeep R.
VON KAENEL, Vincent R.
Inventors: TRIVEDI, Pradeep R.
VON KAENEL, Vincent R.
Title: DELAY LOCKED LOOP INCLUDING A MECHANISM FOR REDUCING LOCK TIME
Abstract:
A delay locked loop (DLL) includes a delay line configured to provide a delayed version of a reference clock as a feedback clock. The DLL also includes a phase detector that may provide an output signal that is indicative of a change in a delay associated with the delay line. The DLL may also include a step size controller that may provide a step size indication corresponding to a first step size in response to detecting the output signal indicating a first change in delay, and to provide a step size indications corresponding to a second step size that is smaller than the first step size in response to detecting the output signal indicating a second change in delay.