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1. (WO2012049954) ELECTRONIC DEVICE AND ELECTRONIC COMPONENT
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2012/049954    International Application No.:    PCT/JP2011/071598
Publication Date: 19.04.2012 International Filing Date: 22.09.2011
IPC:
H01L 21/60 (2006.01)
Applicants: Kabushiki Kaisha Yaskawa Denki [JP/JP]; 2-1, Kurosaki-Shiroishi, Yahatanishi-ku, Kitakyushu-shi, Fukuoka 8060004 (JP) (For All Designated States Except US).
HONDA Tomokazu [JP/JP]; (JP) (For US Only).
KOBAYASHI Yoshihiro [JP/JP]; (JP) (For US Only).
HONDA Ryogo [JP/JP]; (JP) (For US Only)
Inventors: HONDA Tomokazu; (JP).
KOBAYASHI Yoshihiro; (JP).
HONDA Ryogo; (JP)
Agent: MASUDA Hirofumi; Higashiueno Kamimura Bldg. 2nd Floor, 1-7-13 Higashiueno, Taito-ku, Tokyo 1100015 (JP)
Priority Data:
2010-229382 12.10.2010 JP
Title (EN) ELECTRONIC DEVICE AND ELECTRONIC COMPONENT
(FR) DISPOSITIF ÉLECTRONIQUE ET COMPOSANT ÉLECTRONIQUE
(JA) 電子装置及び電子部品
Abstract: front page image
(EN)[Problem] To increase the height of a solder bump even if an interval between electrodes in an electronic component is small. [Solution] Provided is an electronic device which is provided with: an IC chip (100), which has a chip main body (101), a plurality of electrodes (102) formed on the chip main body (101), and a protection film (103) formed to cover the surface of the chip main body (101) with openings at the electrodes (102); a substrate (200) having a plurality of substrate electrodes (202) that are disposed to face the electrodes (102); and a plurality of solder bumps (300), which electrically connect together the electrodes (102) and the substrate electrodes (202). The bonding area between each of the solder bumps (300) and each of the electrodes (102) is smaller than the opening area of the protection film (103).
(FR)L'invention vise à augmenter la hauteur d'une bosse de soudure même si l'intervalle entre des électrodes d'un composant électronique est faible. A cet effet, l'invention concerne un dispositif électronique comprenant : une puce CI (100) qui comporte un corps principal de puce (101), une pluralité d'électrodes (102) formées sur le corps principal de puce (101) et un film de protection (103) formé afin de recouvrir le corps principal de puce (101), avec des ouvertures pour les électrodes (102) ; un substrat (200) ayant une pluralité d'électrodes de substrat (202) qui sont disposées pour faire face aux électrodes (102) ; et une pluralité de bosses de soudure (300) qui connectent électriquement les électrodes (102) et les électrodes de substrat (202) les unes aux autres. La zone de contact entre chacune des bosses de soudure (300) et chacune des électrodes (102) est plus petite que l'aire des ouvertures du film de protection (103).
(JA)【課題】電子部品の電極間隔が狭い場合でもはんだバンプの高さを高くできるようにする。 【解決手段】チップ本体101、チップ本体101に形成された複数の電極102、及び、電極102において開口しチップ本体101の表面を覆うように形成された保護膜103を有するICチップ100と、複数の電極102に対向して配置された複数の基板電極202を有する基板200と、複数の電極102と複数の基板電極202とを電気的に接続する複数のはんだバンプ300と、を備え、はんだバンプ300と電極102との接合面積が、保護膜103の開口面積よりも小さい。
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)