WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO2011156695) AIR GAP ISOLATION BETWEEN THE BIT LINES OF A NON-VOLATILE MEMORY AND METHODS OF MANUFACTURING THE SAME
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2011/156695    International Application No.:    PCT/US2011/039955
Publication Date: 15.12.2011 International Filing Date: 10.06.2011
IPC:
H01L 21/8247 (2006.01), H01L 27/115 (2006.01), H01L 21/764 (2006.01)
Applicants: SANDISK TECHNOLOGIES, INC. [US/US]; Two Legacy Town Center 6900 North Dallas Parkway Plano, TX 75024 (US) (For All Designated States Except US).
HARARI, Eli [US/US]; (US) (For US Only).
PHAM, Tuan [US/US]; (US) (For US Only).
FONG, Yupin [US/US]; (US) (For US Only).
PURAYATH, Vinod, Robert [US/US]; (US) (For US Only)
Inventors: HARARI, Eli; (US).
PHAM, Tuan; (US).
FONG, Yupin; (US).
PURAYATH, Vinod, Robert; (US)
Agent: MAGEN, Burt; Vierra Magen Marcus & DeNiro, LLP 575 Market Street, Suite 2500 San Francisco, CA 94105 (US)
Priority Data:
61/354,094 11.06.2010 US
13/157,178 09.06.2011 US
Title (EN) AIR GAP ISOLATION BETWEEN THE BIT LINES OF A NON-VOLATILE MEMORY AND METHODS OF MANUFACTURING THE SAME
(FR) ISOLATION PAR ESPACES D'AIR ENTRE LES CANAUX BITS D'UNE MÉMOIRE NON VOLATILE ET PROCÉDÉS DE FABRICATION DE CETTE ISOLATION
Abstract: front page image
(EN)Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation can be provided, at least in part, by bit line air gaps that are elongated in a column direction and/or word line air gaps that are elongated in a row direction. The bit line air gaps (306) may be formed in the substrate, extending between adjacent active areas of the substrate, as well as above the substrate surface, extending between adjacent columns of non-volatile storage elements. The word line air gaps may be formed above the substrate surface, extending between adjacent rows of non-volatile storage elements.
(FR)La présente invention se rapporte à l'isolation par espaces d'air dans des matrices mémoires non volatiles et à des procédés de fabrication connexes. L'isolation électrique peut être assurée, au moins en partie, par des espaces d'air de canaux bits qui sont allongés dans une direction de colonne et/ou par des espaces d'air de canaux mots qui sont allongés dans une direction de rangée. Les espaces d'air de canaux bits (306) peuvent être formés dans le substrat, entre des régions actives adjacentes du substrat, ainsi qu'au-dessus de la surface du substrat, entre des colonnes adjacentes d'éléments de mémoire non volatile. Les espaces d'air de canaux mots peuvent être formés au-dessus de la surface du substrat, entre des rangées adjacentes d'éléments de mémoire non volatile.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)