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1. WO2011153499 - SYSTEMS AND METHODS OF MANUFACTURING PRINTED CIRCUIT BOARDS USING BLIND AND INTERNAL MICRO VIAS TO COUPLE SUBASSEMBLIES

Publication Number WO/2011/153499
Publication Date 08.12.2011
International Application No. PCT/US2011/039171
International Filing Date 03.06.2011
IPC
H01L 23/10 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
10characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
CPC
H05K 2201/0195
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2201Indexing scheme relating to printed circuits covered by H05K1/00
01Dielectrics
0183Dielectric layers
0195Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
H05K 2201/096
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2201Indexing scheme relating to printed circuits covered by H05K1/00
09Shape and layout
09209Shape and layout details of conductors
095Conductive through-holes or vias
096Vertically aligned vias, holes or stacked vias
H05K 2203/061
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2203Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
06Lamination
061of previously made multilayered subassemblies
H05K 3/40
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
40Forming printed elements for providing electric connections to or between printed circuits
H05K 3/4069
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
40Forming printed elements for providing electric connections to or between printed circuits
4038Through-connections; Vertical interconnect access [VIA] connections
4053by thick-film techniques
4069for via connections in organic insulating substrates
H05K 3/46
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
46Manufacturing multilayer circuits
Applicants
  • DDI GLOBAL CORP. [US]/[US] (AllExceptUS)
  • KUMAR, Rajesh [US]/[US] (UsOnly)
  • DREYER, Monte, P. [US]/[US] (UsOnly)
  • TAYLOR, Michael, J. [US]/[US] (UsOnly)
Inventors
  • KUMAR, Rajesh
  • DREYER, Monte, P.
  • TAYLOR, Michael, J.
Agents
  • FITCH, Gabriel
Priority Data
61/351,25303.06.2010US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SYSTEMS AND METHODS OF MANUFACTURING PRINTED CIRCUIT BOARDS USING BLIND AND INTERNAL MICRO VIAS TO COUPLE SUBASSEMBLIES
(FR) SYSTÈMES ET PROCÉDÉS DE FABRICATION DE CARTES DE CIRCUITS IMPRIMÉS UTILISANT DES MICRO-TROUS D'INTERCONNEXION BORGNES ET INTERNES POUR COUPLER DES SOUS-ENSEMBLES
Abstract
(EN)
Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies. An embodiment of the invention provides a method of manufacturing a printed circuit including attaching a plurality of metal layer carriers to form a first subassembly including at least one copper foil pad on a first surface, applying an encapsulation material onto the first surface of the first subassembly, curing the encapsulation material and the first subassembly; applying a lamination adhesive to a surface of the cured encapsulation material, forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad, attaching a plurality of metal layer carriers to form a second subassembly, and attaching the first subassembly and the second subassembly.
(FR)
L'invention porte sur des systèmes et des procédés de fabrication de cartes de circuits imprimés utilisant des micro-trous d'interconnexion borgnes et internes pour coupler des sous-ensembles. Un mode de réalisation de l'invention porte sur un procédé de fabrication d'un circuit imprimé consistant à attacher une pluralité de supports de couche métallique pour former un premier sous-ensemble comprenant au moins une plage en feuille de cuivre sur une première surface, appliquer un matériau d'encapsulation sur la première surface du premier sous-ensemble, durcir le matériau d'encapsulation et le premier sous-ensemble; appliquer un adhésif de stratification sur une surface du matériau d'encapsulation durci, former au moins un trou d'interconnexion dans l'adhésif de stratification et le matériau d'encapsulation durci afin d'exposer l'au moins une plage en feuille de cuivre, attacher une pluralité de supports de couche métallique pour former un second sous-ensemble, et attacher le premier sous-ensemble au second sous-ensemble.
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