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1. (WO2011136417) INTEGRATED-TERMINAL-TYPE METAL BASE PACKAGE MODULE AND A METHOD FOR PACKAGING AN INTEGRATED TERMINAL FOR A METAL BASE PACKAGE MODULE
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2011/136417    International Application No.:    PCT/KR2010/002754
Publication Date: 03.11.2011 International Filing Date: 30.04.2010
IPC:
H01L 23/48 (2006.01)
Applicants: WAVENICS INC. [KR/KR]; 2305 Semiconductor-dong, KAIST Guseong-dong, Yuseong-gu Daejeon 305-701 (KR) (For All Designated States Except US).
KIM, Kyoung-Min [KR/KR]; (KR) (For US Only)
Inventors: KIM, Kyoung-Min; (KR)
Agent: YOU ME PATENT AND LAW FIRM; Seolim Bldg., 649-10 Yoksam-dong, Kangnam-ku Seoul 135-080 (KR)
Priority Data:
Title (EN) INTEGRATED-TERMINAL-TYPE METAL BASE PACKAGE MODULE AND A METHOD FOR PACKAGING AN INTEGRATED TERMINAL FOR A METAL BASE PACKAGE MODULE
(FR) MODULE DE BOÎTIER MÉTALLIQUE DE TYPE TERMINAL INTÉGRÉ ET PROCÉDÉ D'ENCAPSULATION D'UN TERMINAL INTÉGRÉ POUR UN MODULE DE BOÎTIER MÉTALLIQUE
(KO) 단자 일체형 금속베이스 패키지 모듈 및 금속베이스 패키지 모듈을 위한 단자 일체형 패키지방법
Abstract: front page image
(EN)The present invention relates to a method for packaging an integrated terminal for a metal base package module which effectively prevents a short circuit or damage by not using wire bonding to connect to an external circuit. The method includes: preparing a metal substrate formed from a conductive metal material; forming an oxide layer by oxidizing the top surface of the metal substrate to a predetermined depth; forming an insulation groove of a uniform width along the edge and from the bottom surface of the metal substrate to the oxide layer; forming a plurality of external connection terminals at intervals along the edge by removing an edge portion of the metal substrate which is disconnected from the middle portion by the insulation groove; mounting an electronic component on the metal substrate or the oxide layer and electrically connecting the electronic component with an external connection terminal.
(FR)La présente invention concerne un procédé destiné à encapsuler un terminal intégré pour un module de boîtier métallique qui empêche efficacement un court-circuit ou un dommage en n'utilisant pas de report de puces nues pour raccordement à un circuit externe. Le procédé comprend : la préparation d'un substrat métallique formé à partir d'un matériau en métal conducteur ; la formation d'une couche d'oxyde par oxydation de la surface supérieure du substrat métallique à une profondeur prédéfinie ; la formation d'une rainure d'isolation d'une largeur uniforme le long du bord et à partir de la surface inférieure du substrat métallique vers la couche d'oxyde ; la formation d'une pluralité de bornes de connexion extérieures à des intervalles le long du bord par le retrait d'une partie de bord du substrat métallique qui est déconnectée de la partie médiane par la rainure d'isolation ; le montage d'un composant électronique sur le substrat métallique ou la couche d'oxyde et le raccordement électrique du composant électronique avec une borne de connexion extérieure.
(KO)본 발명은 외부 회로와의 연결을 와이어 본딩 등을 사용하지 않으므로 단락이나 파손 등을 효과적으로 방지하는 것이 가능한 금속베이스 패키지 모듈을 위한 단자 일체형 패키지방법을 제공한다. 금속베이스 패키지 모듈을 위한 단자 일체형 패키지 방법은 전도성의 금속 재질로 형성되는 금속 기판을 준비하는 기판준비단계와, 금속 기판의 상면을 소정 깊이까지 산화하여 산화물층을 형성하는 산화단계와, 금속 기판의 하면에서 테두리를 따라 일정한 폭으로 산화물층까지 절연홈을 형성하는 절연홈형성단계와, 절연홈에 의하여 중앙부와 단절된 금속 기판의 테두리부분을 간격을 두고 테두리를 따라 제거하여 다수의 외부연결단자를 형성하는 단자형성단계와, 금속 기판 또는 산화물층에 전자부품을 실장하는 실장단계와, 전자부품의 전극과 외부연결단자를 전기적으로 연결하는 단자연결단계를 포함한다.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: Korean (KO)
Filing Language: Korean (KO)