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1. WO2011066727 - MIXED MATERIAL INVERTED MODE GATE-ALL-AROUND CMOS FIELD EFFECT TRANSISTOR

Publication Number WO/2011/066727
Publication Date 09.06.2011
International Application No. PCT/CN2010/070643
International Filing Date 11.02.2010
IPC
H01L 29/78 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
CPC
H01L 21/823807
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823807with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
H01L 21/84
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
84the substrate being other than a semiconductor body, e.g. being an insulating body
H01L 27/0688
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
06including a plurality of individual components in a non-repetitive configuration
0688Integrated circuits having a three-dimensional layout
H01L 27/1203
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1203the substrate comprising an insulating body on a semiconductor body, e.g. SOI
H01L 29/42392
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
42312Gate electrodes for field effect devices
42316for field-effect transistors
4232with insulated gate
42384for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
42392fully surrounding the channel, e.g. gate-all-around
H01L 29/78696
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
786Thin film transistors, ; i.e. transistors with a channel being at least partly a thin film
78696characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
Applicants
  • 中国科学院上海微系统与信息技术研究所 SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY CHINESE ACADEMY OF SCIENCES [CN]/[CN] (AllExceptUS)
  • 肖德元 XIAO, Deyuan [CN]/[CN] (UsOnly)
  • 王曦 WANG, Xi [CN]/[CN] (UsOnly)
  • 张苗 ZHANG, Miao [CN]/[CN] (UsOnly)
  • 陈静 CHEN, Jing [CN]/[CN] (UsOnly)
  • 薛忠营 XUE, Zhongying [CN]/[CN] (UsOnly)
Inventors
  • 肖德元 XIAO, Deyuan
  • 王曦 WANG, Xi
  • 张苗 ZHANG, Miao
  • 陈静 CHEN, Jing
  • 薛忠营 XUE, Zhongying
Agents
  • 上海光华专利事务所 J. Z. M. C PATENT AND TRADEMARK LAW OFFICE
Priority Data
200910199722.301.12.2009CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) MIXED MATERIAL INVERTED MODE GATE-ALL-AROUND CMOS FIELD EFFECT TRANSISTOR
(FR) TRANSISTOR À EFFET DE CHAMP À GRILLE ISOLANTE CMOS DE TYPE INVERSION EN MATÉRIAU HYBRIDE
(ZH) 混合材料反型模式全包围栅CMOS场效应晶体管
Abstract
(EN)
A mixed material inverted mold gate-all-around CMOS field effect transistor is provide, which includes a PMOS region with a first channel (401), an NMOS region with a second channel (301), and a gate region (500), wherein both of the cross-sections of the first channel (401) and the second channel (301) are raceway shaped, and the first channel (401) and the second channel (301) are composed of different semiconductor material, wherein the first channel (401) is n-type Ge material, the second channel (301) is p-type Si material, the surfaces of the first channel (401) and the second channel (301) are fully enclosed by the gate region (500), and a buried oxide layer (202) is disposed between the PMOS region and the NMOS region, and between the PMOS region or NMOS region and the Si substrate, so as to achieve isolation. The transistor structure is simple, compact and highly integrated. When it operates at inversion mode, the channels formed by mixed material, the raceway shaped gate-all-around structure, high-k gate dielectric, and the metal gate can contribute to obtain high carrier mobility, and avoid depletion of the polysilicon gate and the short channel effect.
(FR)
L'invention concerne un transistor à effet de champ à grille isolante CMOS de type inversion en matériau hybride. Le CMOS FET comprend une région PMOS avec un premier canal (401), une région NMOS avec un second canal (301) et une région grille (500), le premier canal et le second canal présentant une coupe transversale en forme d'anneau allongé et des matériaux semi-conducteurs différents. Le premier canal (401) en Ge est de type n et le second canal (301) en Si est de type p. La région grille (500) entoure complètement la surface des premier (401) et second (301) canaux. Des oxydes enfouis (202) viennent entre les régions PMOS et NMOS, et entre la région PMOS ou la région NMOS et le substrat Si de manière à les isoler. Le CMOS FET présente une structure simple, un bon niveau d'intégration et est compact. En mode opérationnel d'inversion, les canaux en matériau hybride, la structure à grille isolante en forme d'anneau allongé, le diélectrique à forte permittivité et la grille métallique peuvent servir à obtenir une circulation élevée de courant de manière à éviter la déplétion de la grille en polysilicium et l'effet canal court.
(ZH)
提供了一种混合晶向反型模式全包围栅CMOS场效应晶体管,其包括:具有第一沟道(401)的PMOS区域、具有第二沟道(301)的NMOS区域及栅区域(500),其中所述的第一沟道(401)及第二沟道(301)的横截面均为跑道形,且具有不同的半导体材料,所述第一沟道(401)为n型Ge材料,所述第二沟道(301)为p型Si材料;栅区域(500)将所述第一沟道(401)及第二沟道(301)的表面完全包围;在PMOS与NMOS区域之间、PMOS区域或NMOS区域与Si衬底之间均有埋层氧化层(202)以实现隔离。该晶体管结构简单、紧凑、集成度高,在反型工作模式下,采用混合材料的沟道、跑道形全包围栅结构、高介电常数栅介质和金属栅,具备高载流子迁移率,可避免多晶硅栅耗尽及短沟道效应。
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