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1. (WO2010150602) ELECTRONIC COMPONENT AND METHOD FOR PRODUCING THE SAME
PCT Biblio. Data
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Pub. No.:
WO/2010/150602
International Application No.:
PCT/JP2010/058449
Publication Date:
29.12.2010
International Filing Date:
19.05.2010
IPC:
H01F 17/00
(2006.01),
H01F 41/04
(2006.01)
H
ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
F
MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
17
Fixed inductances of the signal type
H
ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
F
MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
41
Apparatus or processes specially adapted for manufacturing or assembling the devices covered by this subclass
02
for manufacturing cores, coils or magnets
04
for manufacturing coils
Applicants:
MURATA MANUFACTURING CO., LTD.
[JP/JP]; 10-1, Higashikotari 1-chome, Nagaokakyo-shi, Kyoto 6178555 (JP)
(For All Designated States Except US)
.
UCHIDA Katsuyuki
[JP/JP]; (JP)
(For US Only)
Inventors:
UCHIDA Katsuyuki
; (JP)
Agent:
MORISHITA Takekazu
; Hommachi Eiwa Building, 2-10, Minamihommachi 4-chome, Chuo-ku, Osaka-shi, Osaka 5410054 (JP)
Priority Data:
2009-149243
24.06.2009
JP
Title
(EN)
ELECTRONIC COMPONENT AND METHOD FOR PRODUCING THE SAME
(FR)
COMPOSANT ÉLECTRONIQUE ET SON PROCÉDÉ DE PRODUCTION
(JA)
電子部品及びその製造方法
Abstract:
(EN)
Provided are an electronic component which can suppress magnetic saturation generated by a magnetic flux around each coil conductor, and a method for producing the same. An insulation layer (19) having a first Ni content is prepared. A coil conductor (18) is formed on the insulation layer (19). An insulation layer (16) having a second Ni content higher than the first Ni content is formed on the portion of the insulation layer (19), which excludes the coil conductor (18). The insulation layers (16, 19) and the coil conductor (18) constitute a unit layer (17). A lamination body (12) is obtained by laminating the unit layer (17) and the insulation layer (15). After that, the lamination body (12) is calcined. After the process for calcining the lamination body (12), the Ni content in a first portion of the insulation layer (19) which is sandwiched by the coil conductor (18) from the both sides in a Z-axis direction is lower than the Ni content in a second portion of the insulation layer (19) which excludes the first portion.
(FR)
La présente invention a trait à un composant électronique qui peut supprimer la saturation magnétique générée par un flux magnétique autour de chaque conducteur de bobine et à son procédé de production. Une couche isolante (19) dotée d'une première teneur en Ni est préparée. Un conducteur de bobine (18) est formé sur la couche isolante (19). Une couche isolante (16) dotée d'une seconde teneur en Ni supérieure à la première teneur en Ni est formée sur la partie de la couche isolante (19) qui exclut le conducteur de bobine (18). Les couches isolantes (16, 19) et le conducteur de bobine (18) constituent une couche d'unité (17). Un corps de stratification (12) est obtenu en stratifiant la couche d'unité (17) et la couche isolante (15). Après cela, le corps de stratification (12) est calciné. Après le processus permettant de calciner le corps de stratification (12), la teneur eu Ni dans une première partie de la couche isolante (19) qui est prise en sandwich par le conducteur de bobine (18) des deux côtés dans une direction de l'axe Z est inférieure à la teneur en Ni dans une seconde partie de la couche isolante (19) qui exclut la première partie.
(JA)
各コイル導体の周囲を周回する磁束による磁気飽和の発生を抑制できる電子部品及びその製造方法を提供する。 第1のNi含有率をなす絶縁体層(19)を準備する。絶縁体層(19)上にコイル導体(18)を形成する。第1のNi含有率よりも高い第2のNi含有率をなす絶縁体層(16)を、絶縁体層(19)上のコイル導体(18)以外の部分に形成する。絶縁体層(16,19)及びコイル導体(18)は、単位層(17)を構成している。単位層(17)及び絶縁体層(15)を積層して積層体(12)を得る。この後、積層体(12)を焼成する。積層体(12)を焼成する工程の後には、絶縁体層(19)におけるコイル導体(18)にz軸方向の両側から挟まれている第1の部分でのNi含有率は、絶縁体層(19)における第1の部分以外の第2の部分でのNi含有率よりも低くなっている。
Designated States:
AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language:
Japanese (
JA
)
Filing Language:
Japanese (
JA
)