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Machine translation
1. (WO2010147809) PROGRAMMING REVERSIBLE RESISTANCE SWITCHING ELEMENTS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2010/147809    International Application No.:    PCT/US2010/037841
Publication Date: 23.12.2010 International Filing Date: 08.06.2010
IPC:
G11C 13/00 (2006.01), G11C 7/00 (2006.01), G11C 8/12 (2006.01), G06F 12/06 (2006.01)
Applicants: SANDISK 3D LLC [US/US]; 601 McCarthy Boulevard Milpitas, CA 95035 (US) (For All Designated States Except US).
SEKAR, Deepak, C. [IN/US]; (US) (For US Only).
SCHUEGRAF, Klaus [US/US]; (US) (For US Only).
SCHEUERLEIN, Roy [US/US]; (US) (For US Only)
Inventors: SEKAR, Deepak, C.; (US).
SCHUEGRAF, Klaus; (US).
SCHEUERLEIN, Roy; (US)
Agent: MAGEN, Burt; Vierra Magen Marcus & DeNiro, LLP 575 Market Street, Suite 2500 San Francisco, CA 94105 (US)
Priority Data:
12/488,159 19.06.2009 US
Title (EN) PROGRAMMING REVERSIBLE RESISTANCE SWITCHING ELEMENTS
(FR) PROGRAMMATION D'ÉLÉMENTS DE COMMUTATION RÉVERSIBLE DE RÉSISTANCES
Abstract: front page image
(EN)A storage system and method for operating the storage system that uses reversible resistance-switching elements is described. Techniques are disclosed herein for varying programming conditions to account for different resistances that memory cells have. These techniques can program memory cells in fewer attempts, which can save time and/or power. Techniques are disclosed herein for achieving a high programming bandwidth while reducing the worst case current and/or power consumption. In one embodiment, a page mapping scheme is provided that programs multiple memory cells in parallel in a way that reduces the worst case current and/or power consumption.
(FR)L'invention porte sur un système de mémorisation et sur un procédé d'actionnement du système de mémorisation utilisant des éléments de commutation réversible de résistances. On décrit des techniques de variation des conditions de programmation en fonction des différentes résistances que possèdent des cellules de mémoire. Ces techniques peuvent programmer des cellules de mémoire en quelques tentatives, en pouvant économiser du temps et/ou de l'énergie. On décrit ici des techniques permettant d'obtenir une bande passante de programmation élevée tout en réduisant la consommation de courant et/ou d'énergie dans le pire des cas. Dans un certain mode de réalisation, on fournit un schéma de mappage de page programmant en parallèle de multiples cellules de mémoire d'une façon réduisant la consommation de courant et/ou d'énergie dans le pire des cas.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)