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1. (WO2010129163) PHOTOVOLTAIC CELLS AND METHODS TO ENHANCE LIGHT TRAPPING IN SEMICONDUCTOR LAYER STACKS
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2010/129163 International Application No.: PCT/US2010/031610
Publication Date: 11.11.2010 International Filing Date: 19.04.2010
IPC:
H01L 31/042 (2006.01) ,H01L 31/18 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
31
Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength, or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
04
adapted as conversion devices
042
including a panel or array of photoelectric cells, e.g. solar cells
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
31
Semiconductor devices sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength, or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
18
Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
Applicants:
THINSILICON CORPORATION [US/US]; 1400 N. Shoreline Blvd. #B-3 Mountain View, CA 94043, US (AllExceptUS)
COAKLEY, Kevin, M. [US/US]; US (UsOnly)
STIMSON, Brad [US/US]; US (UsOnly)
ROSENTHAL, Sam [US/US]; US (UsOnly)
Inventors:
COAKLEY, Kevin, M.; US
STIMSON, Brad; US
ROSENTHAL, Sam; US
Agent:
CARROLL, Christopher, R.; The Small Patent Law Group LLP 225 S. Meramec, Ste. 725 Saint Louis, MO 63105, US
Priority Data:
61/176,07206.05.2009US
Title (EN) PHOTOVOLTAIC CELLS AND METHODS TO ENHANCE LIGHT TRAPPING IN SEMICONDUCTOR LAYER STACKS
(FR) CELLULES PHOTOVOLTAÏQUES ET PROCÉDÉS D'AMÉLIORATION DE PIÉGEAGE DE LUMIÈRE DANS DES EMPILEMENTS DE COUCHES SEMI-CONDUCTRICES
Abstract:
(EN) A photovoltaic cell includes a substrate, a semiconductor layer stack, a reflective and conductive electrode layer, and a textured template layer. The semiconductor layer stack is disposed above the substrate. The electrode layer is located between the substrate and the semiconductor layer stack. The template layer is between the substrate and the electrode layer. The template layer includes an undulating upper surface that imparts a predetermined shape to the electrode layer. The electrode layer reflects light back into the semiconductor layer stack based on the predetermined shape of the electrode layer.
(FR) L'invention porte sur une cellule photovoltaïque qui comprend un substrat, un empilement de couches semi-conductrices, une couche d'électrode de réflexion et conductrice, et une couche de matrice texturée. L'empilement de couches semi-conductrices est disposé au-dessus du substrat. La couche d'électrode est située entre le substrat et l'empilement de couches semi-conductrices. La couche de matrice est entre le substrat et la couche d'électrode. La couche de matrice comprend une surface supérieure ondulée qui confère une forme prédéterminée à la couche d'électrode. La couche d'électrode réfléchit la lumière en retour dans l'empilement de couches semi-conductrices sur la base de la forme prédéterminée de la couche d'électrode.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP2356696JP2012522403CN102272944KR1020110112455IN5923/DELNP/2011