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1. (WO2010119701) LIGHT-EMITTING DEVICE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2010/119701 International Application No.: PCT/JP2010/002768
Publication Date: 21.10.2010 International Filing Date: 16.04.2010
IPC:
H01L 33/60 (2010.01) ,H01L 33/54 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
58
Optical field-shaping elements
60
Reflective elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
52
Encapsulations
54
having a particular shape
Applicants:
三賀大輔 SANGA, Daisuke [JP/JP]; JP (UsOnly)
日亜化学工業株式会社 NICHIA CORPORATION [JP/JP]; 徳島県阿南市上中町岡491番地100 491-100, Oka, Kaminaka-cho, Anan-shi, Tokushima 7748601, JP (AllExceptUS)
Inventors:
三賀大輔 SANGA, Daisuke; JP
Priority Data:
2009-09974516.04.2009JP
2009-27673004.12.2009JP
Title (EN) LIGHT-EMITTING DEVICE
(FR) DISPOSITIF ÉLECTROLUMINESCENT
(JA) 発光装置
Abstract:
(EN) A light-emitting device having superior light extraction efficiency. The light-emitting device is provided with: a mounting board with an interconnect pattern disposed on the upper surface of the base; a light reflection layer comprising a first layer, which is partially disposed on the upper surface of the interconnect pattern and formed from a metal material, and a second layer, which is comprised of a dielectric multilayer reflection film formed from stacking dielectric films of differing refractive indices and which covers the upper surface and side surfaces of the first layer; a light-emitting element chip affixed so as to cover at least a part of the light reflection layer; and a translucent encapsulating member which encapsulates the light reflection layer and light-emitting element chip.
(FR) La présente invention concerne un dispositif électroluminescent, offrant un rendement d'extraction de lumière supérieur. Le dispositif électroluminescent comprend : une carte de montage dotée d'un motif d'interconnexion disposé sur la surface supérieure de la base ; une couche de réflexion de lumière comprenant une première couche, partiellement disposée sur la surface supérieure du motif d'interconnexion et formée à partir d'un matériau métallique, et une seconde couche, comprenant un film de réflexion multicouche diélectrique formé à partir d'empilage de films diélectriques d'indices de réfraction différents et recouvrant la surface supérieure et les surfaces latérales de la première couche ; une puce à élément électroluminescent fixée de façon à recouvrir au moins une partie de la couche de réflexion de lumière ; et un élément d'encapsulation translucide encapsulant la couche de réflexion de lumière et la puce à élément électroluminescent.
(JA) 【課題】 光の取り出し効率の優れた発光装置を提供することを目的とする。 【解決手段】 基体の上面に配線パターンが配置された実装基板と、前記配線パターンの上面に部分的に配置され金属材料からなる第1の層と屈折率の異なる誘電体膜が積層された誘電体多層反射膜からなり前記第1の層の上面と側面を被覆する第2の層とを有する光反射層と、前記光反射層の少なくとも一部を覆うように固定された発光素子チップと、前記光反射層と前記発光素子チップを封止する透光性封止部材と、を有することを特徴とする。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (EPO) (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)