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1. (WO2010117987) BUMPED, SELF-ISOLATED GAN TRANSISTOR CHIP WITH ELECTRICALLY ISOLATED BACK SURFACE

Pub. No.:    WO/2010/117987    International Application No.:    PCT/US2010/030049
Publication Date: Fri Oct 15 01:59:59 CEST 2010 International Filing Date: Wed Apr 07 01:59:59 CEST 2010
IPC: H01L 23/34
Applicants: EFFICIENT POWER CONVERSION CORPORATION
LIDOW, Alexander
BEACH, Robert
NAKATA, Alana
CAO, Jianjun
Inventors: LIDOW, Alexander
BEACH, Robert
NAKATA, Alana
CAO, Jianjun
Title: BUMPED, SELF-ISOLATED GAN TRANSISTOR CHIP WITH ELECTRICALLY ISOLATED BACK SURFACE
Abstract:
A semiconductor device comprising a silicon substrate, a compound semiconductor material, an insulating material between the silicon substrate and the compound semiconductor material, and a top surface comprising means of electrical connection, and passivation material, where the passivation material is silicon nitride, silicon dioxide, or a combination of both. The present invention eliminates the need for a thick electrical insulator between a heat sink and the back surface of a surface mounted device by the inclusion of an A1N seed layer to electrically isolate the silicon substrate of the device. The sidewalls of the device are also electrically isolated from the active area of the device.