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1. (WO2010083056) QUANTUM DOT TRANSISTOR
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2010/083056 International Application No.: PCT/US2010/000114
Publication Date: 22.07.2010 International Filing Date: 15.01.2010
IPC:
H01L 29/76 (2006.01) ,H01L 29/10 (2006.01) ,H01L 29/12 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
10
with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
Applicants:
THE BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY [US/US]; 1705 El Camino Real Palo Alto, CA 94306-1106, US (AllExceptUS)
HOLME, Timothy, P. [US/US]; US (UsOnly)
PRINZ, Friedrich, B. [AT/US]; US (UsOnly)
TIAN, Xu [CN/US]; US (UsOnly)
Inventors:
HOLME, Timothy, P.; US
PRINZ, Friedrich, B.; US
TIAN, Xu; US
Agent:
JACOBS, Ron; 350 Cambridge Avenue, Suite 100 Palo Alto, CA 94306, US
Priority Data:
61/205,33816.01.2009US
Title (EN) QUANTUM DOT TRANSISTOR
(FR) TRANSISTOR À POINTS QUANTIQUES
Abstract:
(EN) One or more quantum dots are used to control current flow in a transistor. Instead of being disposed in a channel between source and drain, the quantum dot (or dots) are vertically separated from the source and drain by an insulating layer. Current can tunnel between the source/drain electrodes and the quantum dot (or dots) by tunneling through the insulating layer. Quantum dot energy levels can be controlled with one or more gate electrodes capacitively coupled to some or all of the quantum dot(s). Current can flow between source and drain if a quantum dot energy level is aligned with the energy of incident tunneling electrons. Current flow between source and drain is inhibited if no quantum dot energy level is aligned with the energy of incident tunneling electrons. Here energy level alignment is understood to have a margin of about the thermal energy (e.g., 26 meV at room temperature).
(FR) L'invention concerne un ou plusieurs points quantiques utilisés pour contrôler un flux de courant dans un transistor. Au lieu d'être disposés dans un canal entre la source et le drain, le ou les points quantiques sont séparés verticalement de la source et du drain par une couche isolante. Le courant peut traverser par effet tunnel entre les électrodes source/drain et le ou les points quantiques par un effet tunnel à travers la couche d'isolation. Les niveaux d'énergie des points quantiques peuvent être contrôlés avec une ou plusieurs électrodes de grille couplées de manière capacitive à tous les points quantiques ou à une partie de ceux-ci. Le courant peut s'écouler entre la source et le drain si le niveau d'énergie des points quantiques est aligné avec l'énergie des électrons incidents qui traversent par effet tunnel. Le flux de courant entre la source et le drain est inhibé si aucun niveau d'énergie de points quantiques n'est aligné avec l'énergie des électrons incidents qui traversent par effet tunnel. Ici, l'alignement du niveau d'énergie est entendu comme ayant une marge d'environ l'énergie thermique (par exemple 26 meV à température ambiante).
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)