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1. (WO2010078433) DISTRIBUTED TABLE-DRIVEN POWER MODE COMPUTATION FOR CONTROLLING OPTIMAL CLOCK AND VOLTAGE SWITCHING
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2010/078433 International Application No.: PCT/US2009/069829
Publication Date: 08.07.2010 International Filing Date: 30.12.2009
IPC:
G06F 1/32 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
1
Details not covered by groups G06F3/-G06F13/82
26
Power supply means, e.g. regulation thereof
32
Means for saving power
Applicants:
SYNOPSYS, INC. [US/US]; 700 East Middlefield Road Mountain View, CA 94043, US (AllExceptUS)
STRUIK, Pieter [NL/NL]; NL (UsOnly)
Inventors:
STRUIK, Pieter; NL
Agent:
LOVEJOY, Brett, A.; Jones Day 555 California Street 26th Floor San Francisco, CA 94104, US
Priority Data:
12/347,00831.12.2008US
Title (EN) DISTRIBUTED TABLE-DRIVEN POWER MODE COMPUTATION FOR CONTROLLING OPTIMAL CLOCK AND VOLTAGE SWITCHING
(FR) CALCUL DE MODE D'ALIMENTATION COMMANDÉ PAR TABLE DISTRIBUÉE POUR COMMANDER UNE HORLOGE ET UNE COMMUTATION DE TENSION OPTIMALES
Abstract:
(EN) A method for computing the optimal power mode for a system-on-chip (SoC) in which both the clock and Vdd settings are controlled. Information from hardware blocks is synthesized into a global power mode for the entire SoC. The clocks can be disabled or enabled, and Vdd voltages can be disabled, set at a nominal operating level, and set at a retention level in which the state of memory and registers is retained.
(FR) L'invention porte sur un procédé de calcul du mode d'alimentation optimal pour un système sur puce (SoC) dans lequel à la fois l'horloge et les réglages Vdd sont commandés. Des informations provenant de blocs matériels sont synthétisées dans un mode d'alimentation global pour le SoC entier. Les horloges peuvent être désactivées ou activées, et les tensions Vdd peuvent être désactivées, réglées à un niveau de fonctionnement nominal, et réglées à un niveau de rétention dans lequel l'état de la mémoire et de registres est conservé.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP2387743CN102301307