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1. (WO2010078189) FLASH CELL WITH INTEGRATED HIGH-K DIELECTRIC AND METAL-BASED CONTROL GATE
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2010/078189 International Application No.: PCT/US2009/069394
Publication Date: 08.07.2010 International Filing Date: 23.12.2009
IPC:
H01L 27/115 (2006.01) ,H01L 21/8247 (2006.01) ,H01L 21/31 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
112
Read-only memory structures
115
Electrically programmable read-only memories
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8239
Memory structures
8246
Read-only memory structures (ROM)
8247
electrically-programmable (EPROM)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, CA 95052, US (AllExceptUS)
JAN, Chia-Hong [US/US]; US (UsOnly)
HAFEZ, Walid, M. [US/US]; US (UsOnly)
Inventors:
JAN, Chia-Hong; US
HAFEZ, Walid, M.; US
Agent:
WINKLE, Robert, G.; Winkle, PLLC c/o CPA Global P.O. Box 52050 Minneapolis, MN 55402, US
Priority Data:
12/347,90431.12.2008US
Title (EN) FLASH CELL WITH INTEGRATED HIGH-K DIELECTRIC AND METAL-BASED CONTROL GATE
(FR) CELLULE DE MÉMOIRE FLASH AVEC DIÉLECTRIQUE À CONSTANTE K ÉLEVÉE INTÉGRÉE ET GRILLE DE COMMANDE À BASE DE MÉTAL
Abstract:
(EN) A semiconductor device is described having an integrated high-k dielectric layer and metal control gate. A method of fabricating the same is described. Embodiments of the semiconductor device include a high-k dielectric layer disposed on a floating gate. The high-k dielectric layer defines a recess. A metal control gate is formed in the recess.
(FR) L'invention porte sur un dispositif à semi-conducteurs qui présente une couche diélectrique à constante k élevée intégrée et une grille de commande en métal. L'invention porte sur un procédé de fabrication de celui-ci. Des modes de réalisation du dispositif à semi-conducteurs comprennent une couche diélectrique à constante k élevée disposée sur une grille flottante. La couche diélectrique à constante k élevée définit une cavité. Une grille de commande en métal est formée dans la cavité.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP2382665JP2012514346CN102272929KR1020110099323