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1. (WO2010078054) TUNNEL FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING SAME
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2010/078054 International Application No.: PCT/US2009/068550
Publication Date: 08.07.2010 International Filing Date: 17.12.2009
IPC:
H01L 29/78 (2006.01) ,H01L 21/336 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95052, US (AllExceptUS)
GOEL, Niti [IN/US]; US (UsOnly)
TSAI, Wilman [US/US]; US (UsOnly)
KAVALIEROS, Jack [US/US]; US (UsOnly)
Inventors:
GOEL, Niti; US
TSAI, Wilman; US
KAVALIEROS, Jack; US
Agent:
VINCENT, Lester, J.; Blakely Sokoloff Taylor & Zafman 1279 Oakmead Parkway Sunnyvale, California 94085, US
Priority Data:
12/319,10230.12.2008US
Title (EN) TUNNEL FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING SAME
(FR) TRANSISTOR À EFFET DE CHAMP TUNNEL ET PROCÉDÉ DE FABRICATION DE CE DERNIER
Abstract:
(EN) A TFET includes a source region (110, 210), a drain region (120, 220), a channel region (130, 230) between the source region and the drain region, and a gate region (140, 240) adjacent to the channel region. The source region contains a first compound semiconductor including a first Group III material and a first Group V material, and the channel region contains a second compound semiconductor including a second Group III material and a second Group V material. The drain region may contain a third compound semiconductor including a third Group III material and a third Group V material.
(FR) La présente invention porte sur un transistor à effet de champ tunnel (TFET) qui comprend une région source (110, 210), une région drain (120, 220), une région canal (130, 230) entre la région source et la région drain, et une région grille (140, 240) adjacente à la région canal. La région source contient un premier semi-conducteur composé comprenant un premier matériau du Groupe III et un premier matériau du Groupe V, et la région canal contient un deuxième semi-conducteur composé comprenant un deuxième matériau du Groupe III et un deuxième matériau du Groupe V. La région drain peut contenir un troisième semi-conducteur composé comprenant un troisième matériau du Groupe III et un troisième matériau du Groupe V.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP2382667JP2012514345CN102272933KR1020110089884