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1. (WO2010077768) POISON BIT ERROR CHECKING CODE SCHEME
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2010/077768 International Application No.: PCT/US2009/067530
Publication Date: 08.07.2010 International Filing Date: 10.12.2009
IPC:
G06F 11/07 (2006.01) ,G06F 11/08 (2006.01) ,G06F 11/10 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
08
Error detection or correction by redundancy in data representation, e.g. by using checking codes
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
08
Error detection or correction by redundancy in data representation, e.g. by using checking codes
10
Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95052, US (AllExceptUS)
AGARWAL, Rajat [US/US]; US (UsOnly)
HUDDLESTON, Scott [US/US]; US (UsOnly)
BRZEZINSKI, Dennis [US/US]; US (UsOnly)
Inventors:
AGARWAL, Rajat; US
HUDDLESTON, Scott; US
BRZEZINSKI, Dennis; US
Agent:
AGHEVLI, Ramin; Caven & Aghevli c/o CPA GLOBAL P.O. Box 52050 Minneapolis, Minnesota 55402, US
Priority Data:
12/317,84929.12.2008US
Title (EN) POISON BIT ERROR CHECKING CODE SCHEME
(FR) TECHNIQUE DE CODE DE DÉTECTION D'ERREUR À BIT POISON
Abstract:
(EN) In one embodiment, a method provides determining one of an occurrence and a non-occurrence of an event, the one of the occurrence and the non-occurrence resulting in an event determination; and processing a code having an event bit, said processing in accordance with the determination and the code, by determining if the event bit corresponds to the event determination, and if the event bit does not correspond to the event determination, encoding the code to generate a poison bit that corresponds to the event determination.
(FR) Dans un mode de réalisation, l'invention porte sur un procédé qui consiste à déterminer l'une d'une occurrence et d'une non-occurrence d'un événement, celle de l'occurrence et de la non-occurrence se traduisant par une détermination d'événement ; et traiter un code comprenant un bit d'événement, ledit traitement étant effectué en fonction de la détermination et du code, par détermination du fait que le bit d'événement correspond ou non à la détermination d'événement, et si le bit d'événement ne correspond pas à la détermination d'événement, coder le code pour générer un bit poison qui correspond à la détermination d'événement.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
EP2370899JP2012508425CN102171658KR1020110050720