Search International and National Patent Collections
Some content of this application is unavailable at the moment.
If this situation persists, please contact us atFeedback&Contact
1. (WO2010076019) A METALLIZATION SYSTEM OF A SEMICONDUCTOR DEVICE COMPRISING EXTRA-TAPERED TRANSITION VIAS
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2010/076019 International Application No.: PCT/EP2009/009308
Publication Date: 08.07.2010 International Filing Date: 29.12.2009
IPC:
H01L 21/768 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
768
Applying interconnections to be used for carrying current between separate components within a device
Applicants:
ADVANCED MICRO DEVICES, INC [US/US]; One AMD Place Mail Stop 68 Sunnyvale, CA 94088-3453, US (AllExceptUS)
AMD FAB 36 LIMITED LIABILITY COMPANY & CO. KG [DE/DE]; Wilschdorfer Landstrasse 101 01109 Dresden, DE (AllExceptUS)
FEUSTEL, Frank [DE/DE]; DE (UsOnly)
WERNER, Thomas [DE/DE]; DE (UsOnly)
FROHBERG, Kai [DE/DE]; DE (UsOnly)
Inventors:
FEUSTEL, Frank; DE
WERNER, Thomas; DE
FROHBERG, Kai; DE
Agent:
PFAU, Anton, K.; Grünecker, Kinkeldey, Stockmair & Schwanhäusser Leopoldstrasse 4 80802 Mϋnchen, DE
Priority Data:
10 2008 063 430.131.12.2008DE
12/634,21609.12.2009US
Title (EN) A METALLIZATION SYSTEM OF A SEMICONDUCTOR DEVICE COMPRISING EXTRA-TAPERED TRANSITION VIAS
(FR) SYSTÈME DE MÉTALLISATION D'UN DISPOSITIF À SEMI-CONDUCTEUR COMPRENANT DES TROUS D'INTERCONNEXION DE TRANSITION À CONICITÉ ACCRUE
Abstract:
(EN) In a metallization system of a semiconductor device a transition via may be provided with an increased degree of tapering by modifying a corresponding etch sequence. For example, the resist mask for forming the via opening may once, or several times be eroded in order to increase the lateral size of the corresponding mask opening. Due to the pronounced degree of tapering, enhanced deposition conditions may be accomplished during the subsequent electrochemical deposition process for commonly filling the via opening and a wide trench connected thereto.
(FR) L'invention concerne un système de métallisation d'un dispositif à semi-conducteur dans lequel un trou d'interconnexion de transition peut être agencé avec un degré accru de conicité en modifiant une séquence de gravure correspondante. Par exemple, le masque réserve pour former l'ouverture du trou d'interconnexion peut être érodé une ou plusieurs fois afin d'augmenter la taille latérale de l'ouverture correspondante du masque. A cause du degré prononcé de conicité, des conditions améliorées de déposition peuvent être obtenues pendant le procédé successif de déposition électrochimique pour remplir généralement l'ouverture du trou d'interconnexion et une tranchée large reliée à celui-ci.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)
Also published as:
JP2012514319CN102362343KR1020130127013IN4996/DELNP/2011