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1. (WO2010074948) INTEGRATED CIRCUIT, 1T-1C EMBEDDED MEMORY CELL CONTAINING SAME, AND METHOD OF MANUFACTURING 1T-1C MEMORY CELL FOR EMBEDDED MEMORY APPLICATION
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2010/074948 International Application No.: PCT/US2009/067066
Publication Date: 01.07.2010 International Filing Date: 08.12.2009
IPC:
H01L 27/108 (2006.01) ,H01L 21/8242 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
108
Dynamic random access memory structures
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8239
Memory structures
8242
Dynamic random access memory structures (DRAM)
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95052, US (AllExceptUS)
DOYLE, Brian S. [IE/US]; US (UsOnly)
SOMASEKHAR, Dinesh [IN/US]; US (UsOnly)
DEWEY, Gilbert [US/US]; US (UsOnly)
SURI, Satyarth [IN/US]; US (UsOnly)
Inventors:
DOYLE, Brian S.; US
SOMASEKHAR, Dinesh; US
DEWEY, Gilbert; US
SURI, Satyarth; US
Agent:
VINCENT, Lester J.; Blakely Sokoloff Taylor & Zafman 1279 Oakmead Parkway Sunnyvale, California 94085, US
Priority Data:
12/317,50722.12.2008US
Title (EN) INTEGRATED CIRCUIT, 1T-1C EMBEDDED MEMORY CELL CONTAINING SAME, AND METHOD OF MANUFACTURING 1T-1C MEMORY CELL FOR EMBEDDED MEMORY APPLICATION
(FR) CIRCUIT INTÉGRÉ, CELLULE MÉMOIRE 1T-1C LE CONTENANT ET PROCÉDÉ DE FABRICATION D'UNE CELLULE MÉMOIRE 1T-1C POUR APPLICATION DE MÉMOIRE INCORPORÉE
Abstract:
(EN) An integrated circuit includes a semiconducting substrate (110), electrically conductive layers (120) over the semiconducting substrate, and a capacitor (130) at least partially embedded within the semiconducting substrate such that the capacitor is entirely underneath the electrically conductive layers. A storage node voltage is on an outside layer (132) of the capacitor. In the same or another embodiment, the integrated circuit may act as a 1T-1C embedded memory cell including the semiconducting substrate, an electrically insulating stack (160) over the semiconducting substrate, a transistor (140) including a source/drain region (142) within the semiconducting substrate and a gate region (141) above the semiconducting substrate, a trench (111) extending through the electrically insulating layers and into the semiconducting substrate, a first electrically insulating layer (131) located within the trench, and the capacitor located within the trench interior to the first electrically insulating layer.
(FR) Le circuit intégré selon l'invention comprend un substrat semi-conducteur (110), des couches électriquement conductrices (120) sur le substrat semi-conducteur et un condensateur (130) au moins partiellement incorporé dans le substrat semi-conducteur de sorte que le condensateur se trouve entièrement sous les couches électriquement conductrices. Une tension de nœud de stockage se trouve sur une couche extérieure (132) du condensateur. Dans le même mode de réalisation ou un autre, le circuit intégré peut agir comme une cellule mémoire 1T-1C incorporée comprenant le substrat semi-conducteur, un empilement électriquement isolant (160) sur le substrat semi-conducteur, un transistor (140) comprenant une zone de source/drain (142) dans le substrat semi-conducteur et une zone de gâchette (141) au-dessus du substrat semi-conducteur, une tranchée (111) s'étendant à travers les couches électriquement isolantes et dans le substrat semi-conducteur, une première couche électriquement isolante (131) située dans la tranchée et le condensateur situé dans la tranchée à l'intérieur de la première couche électriquement isolante.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)