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1. (WO2010073584) SOLID-STATE IMAGE PICKUP DEVICE, DIGITAL CAMERA, AND A/D CONVERSION METHOD
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/2010/073584 International Application No.: PCT/JP2009/007058
Publication Date: 01.07.2010 International Filing Date: 21.12.2009
IPC:
H03M 1/56 (2006.01) ,H04N 5/3745 (2011.01)
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
M
CODING, DECODING OR CODE CONVERSION, IN GENERAL
1
Analogue/digital conversion; Digital/analogue conversion
12
Analogue/digital converters
50
with intermediate conversion to time interval
56
Input signal compared with linear ramp
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
N
PICTORIAL COMMUNICATION, e.g. TELEVISION
5
Details of television systems
30
Transforming light or analogous information into electric information
335
using solid-state image sensors [SSIS]
369
SSIS architecture; Circuitry associated therewith
374
Addressed sensors, e.g. MOS or CMOS sensors
3745
having additional components embedded within a pixel or connected to a group of pixels within a sensor matrix, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
Applicants:
パナソニック株式会社 PANASONIC CORPORATION [JP/JP]; 大阪府門真市大字門真1006番地 1006, Oaza Kadoma, Kadoma-shi, Osaka 5718501, JP (AllExceptUS)
田中望美 TANAKA, Nozomi; null (UsOnly)
Inventors:
田中望美 TANAKA, Nozomi; null
Agent:
新居広守 NII, Hiromori; 大阪府大阪市淀川区西中島5丁目3番10号タナカ・イトーピア新大阪ビル6階新居国際特許事務所内 c/o NII Patent Firm, 6F, Tanaka Ito Pia Shin-Osaka Bldg.,3-10, Nishi Nakajima 5-chome, Yodogawa-ku, Osaka-city, Osaka 5320011, JP
Priority Data:
2008-33162625.12.2008JP
Title (EN) SOLID-STATE IMAGE PICKUP DEVICE, DIGITAL CAMERA, AND A/D CONVERSION METHOD
(FR) DISPOSITIF DE CAPTURE D'IMAGE À SEMI-CONDUCTEUR, APPAREIL PHOTO NUMÉRIQUE ET PROCÉDÉ DE CONVERSION A/N
(JA) 固体撮像装置、デジタルカメラ及びAD変換方法
Abstract:
(EN) A solid-state image pickup device (A) is provided with a pixel unit (1) which comprises a plurality of unit pixels (7) arranged in a matrix, a column signal line which is provided for each column of the pixel unit (1), an A/D conversion unit (3) which converts the voltage of a pixel signal from the column signal line to a digital value by counting the time required for a reference signal (Vramp) to reach the voltage of the pixel signal, and a clock signal generator (C) which generates for the A/D conversion unit (3) a counter clock (CLKAD) for the counting. During the A/D conversion, the clock signal generator (C) switches the frequency of the counter clock (CLKAD) from a first frequency to a second frequency different from the first frequency.
(FR) L'invention porte sur un dispositif de capture d'image à semi-conducteur (A) qui comprend une unité de pixel (1) qui comprend une pluralité de pixels unitaires (7) agencés en une matrice, une ligne de signal de colonne qui est installée pour chaque colonne de l'unité de pixel (1), une unité de conversion A/N (3) qui convertit la tension d'un signal de pixel provenant de la ligne de signal de colonne en une valeur numérique par comptage du temps requis pour qu'un signal de référence (Vramp) atteigne la tension du signal de pixel, et un générateur de signal d'horloge (C) qui génère pour l'unité de conversion A/N (3) une horloge de compteur (CLKAD) pour le comptage. Durant la conversion A/N, le générateur de signal d'horloge (C) commute la fréquence de l'horloge de compteur (CLKAD) d'une première fréquence à une seconde fréquence différente de la première fréquence.
(JA)  本発明の固体撮像装置(A)は、行列状に配置された複数の単位画素(7)を有する画素部(1)と、前記画素部(1)の列毎に設けられた列信号線と、参照信号(Vramp)が前記列信号線からの画素信号の電圧に達するまでの時間を計数することにより、前記画素信号の電圧をデジタル値に変換するAD変換部(3)と、前記AD変換部(3)に対して前記計数用のカウンタクロックCLKADを生成するクロック信号生成部(C)とを備え、前記クロック信号生成部(C)は、AD変換の期間中に前記カウンタクロックCLKADの周波数を第1の周波数から、第1の周波数と異なる第2の周波数へ切り替える。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)
Also published as:
CN102265606