WO2010059361 METHODS AND APPARATUS FOR PRODUCING SEMICONDUCTOR ON INSULATOR STRUCTURES USING DIRECTED EXFOLIATION

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Publication Number WO/2010/059361

Publication Date 27.05.2010

International Application No. PCT/US2009/062504

International Filing Date 29.10.2009

IPC

H01L 21/762 2006.01

CPC

H01L 21/76254

Applicants

CORNING INCORPORATED [US]/[US] (AllExceptUS)
CHEREKDJIAN, Sarko [US]/[US] (UsOnly)
CITES, Jeffrey, S. [US]/[US] (UsOnly)
COUILLARD, James, G. [US]/[US] (UsOnly)
MASCHMEYER, Richard, O. [US]/[US] (UsOnly)
MOORE, Michael, J. [US]/[US] (UsOnly)
USENKO, Alex [RU]/[US] (UsOnly)

Inventors

CHEREKDJIAN, Sarko
CITES, Jeffrey, S.
COUILLARD, James, G.
MASCHMEYER, Richard, O.
MOORE, Michael, J.
USENKO, Alex

Agents

SCOTT, Steven, J.

Priority Data

12/290,362		30.10.2008		US
12/290,384		30.10.2008		US

Publication Language English (EN)

Filing Language English (EN)

Designated States

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Title

(EN) METHODS AND APPARATUS FOR PRODUCING SEMICONDUCTOR ON INSULATOR STRUCTURES USING DIRECTED EXFOLIATION

(FR) PROCÉDÉS ET APPAREILS DE PRODUCTION DE SEMI-CONDUCTEURS SUR DES STRUCTURES ISOLANTES AU MOYEN D’UNE EXFOLIATION DIRIGÉE

Abstract

(EN)

Methods and apparatus provide for forming a semiconductor-on-insulator (SOI) structure, including subjecting a implantation surface of a donor semiconductor wafer to an ion implantation step to create a weakened slice in cross-section defining an exfoliation layer of the donor semiconductor wafer; and subjecting the donor semiconductor wafer to a spatial variation step, either before, during or after the ion implantation step, such that at least one parameter of the weakened slice varies spatially across the weakened slice in at least one of X- and Y- axial directions.

(FR)

Les procédés et appareils selon l’invention servent à former une structure de semi-conducteur sur isolant (SOI), consistant à soumettre une surface d’implantation d’une plaquette semi-conductrice donneuse vers une étape d’implantation d’ions pour créer une tranche affaiblie dans la section transversale définissant une couche d’exfoliation de la plaquette semi-conductrice donneuse; et à soumettre la plaquette semi-conductrice donneuse à une étape de variation spatiale, avant, pendant ou après l’étape d’implantation d’ions, de sorte qu’au moins un paramètre de la tranche affaiblie varie spatialement à travers la tranche affaiblie dans au moins l’une des directions axiales X ou Y.

Also published as

EP2356676

CN102203934

KR1020110081881

SG170988

EP2359400

CN102203933

KR1020110081318

WO/2010/059367

JP2012507868

JP2012507870

Latest bibliographic data on file with the International Bureau

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70	Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71	Manufacture of specific parts of devices defined in group H01L21/7086
76	Making of isolation regions between components
762	Dielectric regions

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70	Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71	Manufacture of specific parts of devices defined in group H01L21/7086
76	Making of isolation regions between components
762	Dielectric regions

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70	Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71	Manufacture of specific parts of devices defined in group H01L21/70
76	Making of isolation regions between components
762	Dielectric regions ; , e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
7624	using semiconductor on insulator [SOI] technology
76251	using bonding techniques
76254	with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70	Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71	Manufacture of specific parts of devices defined in group H01L21/70
76	Making of isolation regions between components
762	Dielectric regions ; , e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
7624	using semiconductor on insulator [SOI] technology
76251	using bonding techniques
76254	with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

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1. WO2010059361 - METHODS AND APPARATUS FOR PRODUCING SEMICONDUCTOR ON INSULATOR STRUCTURES USING DIRECTED EXFOLIATION

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