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1. WO2010057941 - A METHOD OF PRODUCING A SILICON-ON-SAPPHIRE TYPE HETEROSTRUCTURE.

Publication Number WO/2010/057941
Publication Date 27.05.2010
International Application No. PCT/EP2009/065440
International Filing Date 19.11.2009
IPC
H01L 21/762 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71Manufacture of specific parts of devices defined in group H01L21/7086
76Making of isolation regions between components
762Dielectric regions
CPC
H01L 21/2007
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth ; solid phase epitaxy
2003Characterised by the substrate
2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
H01L 21/76256
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
76Making of isolation regions between components
762Dielectric regions ; , e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
7624using semiconductor on insulator [SOI] technology
76251using bonding techniques
76256using silicon etch back techniques, e.g. BESOI, ELTRAN
Applicants
  • S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES [FR]/[FR] (AllExceptUS)
  • GAUDIN, Gweltaz [FR]/[FR] (UsOnly)
  • VAUFREDAZ, Alexandre [FR]/[FR] (UsOnly)
  • GUITTARD, Fleur [FR]/[FR] (UsOnly)
Inventors
  • GAUDIN, Gweltaz
  • VAUFREDAZ, Alexandre
  • GUITTARD, Fleur
Agents
  • DESORMIERE, Pierre-Louis
Priority Data
085795424.11.2008FR
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) A METHOD OF PRODUCING A SILICON-ON-SAPPHIRE TYPE HETEROSTRUCTURE.
(FR) PROCÉDÉ DE PRODUCTION D’UNE HÉTÉROSTRUCTURE DE TYPE SILICIUM SUR SAPHIR
Abstract
(EN)
The invention provides a method of producing a heterostructure of the silicon-on-sapphire type, comprising bonding an SOI substrate (110) onto a sapphire substrate (120) and thinning the SOI substrate, thinning being carried out by grinding followed by etching of the SOI substrate (110). In accordance with the method, grinding is carried out using a wheel (210) with a grinding surface (211) that comprises abrasive particles having a mean dimension of more than 6.7 urn; further, after grinding and before etching, said method comprises a step of post-grinding annealing of the heterostructure carried out at a temperature in the range 150 °C to 170 °C.
(FR)
L’invention concerne un procédé de production d’une hétérostructure de type silicium sur saphir, consistant à lier un substrat en SOI (110) sur un substrat de saphir (120), et à amincir le substrat en SOI, l’amincissement étant réalisé par un broyage suivi d’une gravure du substrat en SOI (110). Selon le procédé, le broyage est réalisé au moyen d’une roue (210) avec une surface de broyage (211) qui comprend des particules abrasives dont la dimension moyenne est supérieure à 6,7 µm; en outre, après le broyage et avant la gravure, ledit procédé comprend une étape consistant à une recuisson post-broyage de l’hétérostructure réalisée à une température comprise entre 150 °C et 170 °C.
Also published as
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