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1. (WO2010032469) PLASMA DISPLAY PANEL
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2010/032469    International Application No.:    PCT/JP2009/004682
Publication Date: 25.03.2010 International Filing Date: 17.09.2009
IPC:
H01J 11/12 (2012.01), H01J 11/22 (2012.01), H01J 11/24 (2012.01), H01J 11/26 (2012.01), H01J 11/34 (2012.01), H01J 11/42 (2012.01)
Applicants: PANASONIC CORPORATION [JP/JP]; 1006, Oaza Kadoma, Kadoma-shi, Osaka 5718501 (JP) (For All Designated States Except US).
NASU, Shougo; (For US Only).
OOHATA, Hisayo; (For US Only).
SATO, Kenji; (For US Only).
NINOMIYA, Syouzou; (For US Only).
HASEGAWA, Kenji; (For US Only)
Inventors: NASU, Shougo; .
OOHATA, Hisayo; .
SATO, Kenji; .
NINOMIYA, Syouzou; .
HASEGAWA, Kenji;
Agent: NAITO, Hiroki; (JP)
Priority Data:
2008-237384 17.09.2008 JP
2008-237385 17.09.2008 JP
2008-237386 17.09.2008 JP
2008-237387 17.09.2008 JP
Title (EN) PLASMA DISPLAY PANEL
(FR) PANNEAU D'AFFICHAGE À PLASMA
(JA) プラズマディスプレイパネル
Abstract: front page image
(EN)Disclosed is a plasma display panel comprising: a front plate wherein a dielectric layer is so formed as to cover a plurality of display electrodes formed on a substrate and a protective layer is formed on the dielectric layer; a back plate which is so arranged as to face the front plate and to form a discharge space therebetween, and provided with data electrodes lying in the direction intersecting the display electrodes and partition walls for dividing the discharge space; and a phosphor layer formed by applying a phosphor ink, which is composed of a phosphor material and a dispersant, between the partition walls.  The phosphor layer is formed by coating the surfaces of the partition walls with nanoparticles having a diameter of not less than 1 nm but not more than 100 nm or a solvent having an affinity with the dispersant of the phosphor ink, and then applying the phosphor ink to the surfaces of the partition walls.
(FR)
(JA) プラズマディスプレイパネルは、基板上に形成した複数の表示電極を覆うように誘電体層を形成するとともにその誘電体層上に保護層を形成した前面基板と、この前面基板に放電空間を形成するように対向配置されかつ表示電極と交差する方向にデータ電極を形成するとともに放電空間を区画する隔壁を設けた背面基板と、この背面基板の隔壁間に蛍光体材料と分散剤とからなる蛍光体インクを塗布して形成した蛍光体層とを有し、隔壁の表面に直径1nm以上100nm以下の範囲にあるナノ粒子、または蛍光体インクの分散剤に対して親和性を有する溶剤を塗布し、その後蛍光体インクを塗布して蛍光体層を形成する。
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)