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1. (WO2010029885) SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2010/029885    International Application No.:    PCT/JP2009/065374
Publication Date: 18.03.2010 International Filing Date: 27.08.2009
IPC:
H01L 29/786 (2006.01), H01L 21/28 (2006.01), H01L 29/417 (2006.01)
Applicants: SEMICONDUCTOR ENERGY LABORATORY CO., LTD. [JP/JP]; 398, Hase, Atsugi-shi, Kanagawa 2430036 (JP) (For All Designated States Except US).
YAMAZAKI, Shunpei [JP/JP]; (JP) (For US Only).
AKIMOTO, Kengo; (For US Only).
KOMORI, Shigeki; (For US Only).
UOCHI, Hideki; (For US Only)
Inventors: YAMAZAKI, Shunpei; (JP).
AKIMOTO, Kengo; .
KOMORI, Shigeki; .
UOCHI, Hideki;
Priority Data:
2008-235111 12.09.2008 JP
Title (EN) SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
(FR) DISPOSITIF À SEMI-CONDUCTEURS ET PROCÉDÉ DE FABRICATION ASSOCIÉ
Abstract: front page image
(EN)It is an object of the present invention to provide a thin film transistor in which an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn) is used and contact resistance of a source or a drain electrode layer is reduced, and a manufacturing method thereof. An IGZO layer is provided over the source electrode layer and the drain electrode layer, and source and drain regions having lower oxygen concentration than the IGZO semiconductor layer are intentionally provided between the source and drain electrode layers and the gate insulating layer, so that ohmic contact is made.
(FR)L'invention concerne un transistor à couche mince, impliquant l'utilisation d'un film semi-conducteur d'oxyde contenant de l'indium (In), du gallium (Ga), et du zinc (Zn) et la réduction d’une résistance de contact d'une couche d'électrode de source ou de drain, ainsi qu'un procédé de fabrication associé. Une couche IGZO est fournie sur la couche d'électrode de source et la couche d'électrode de drain, et les régions de source et de drain ayant une concentration d'oxygène inférieure à celle de la couche semi-conductrice IZGO sont volontairement fournies entre les couches d'électrode de source et de drain et la couche d'isolation de grille, de sorte que le contact ohmique soit établi.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)