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1. (WO2010023846) SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2010/023846    International Application No.:    PCT/JP2009/003960
Publication Date: 04.03.2010 International Filing Date: 20.08.2009
IPC:
H01L 21/205 (2006.01), C23C 16/34 (2006.01), C30B 29/38 (2006.01)
Applicants: YAMAGUCHI UNIVERSITY [JP/JP]; 1677-1,Yoshida, Yamaguchi-shi, Yamaguchi 7538511 (JP) (For All Designated States Except US).
TADATOMO, Kazuyuki [JP/JP]; (JP) (For US Only).
OKADA, Narihito [JP/JP]; (JP) (For US Only)
Inventors: TADATOMO, Kazuyuki; (JP).
OKADA, Narihito; (JP)
Agent: MAEDA, Hiroshi; (JP)
Priority Data:
2008-215027 25.08.2008 JP
2009-054934 09.03.2009 JP
2009-056964 10.03.2009 JP
Title (EN) SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
(FR) SUBSTRAT SEMI-CONDUCTEUR ET SON PROCÉDÉ DE FABRICATION
(JA) 半導体基板及びその製造方法
Abstract: front page image
(EN)A semiconductor substrate is provided with: a sapphire substrate (11) wherein a substrate surface (12) has a substrate main surface (12a) and a crystal growing surface (12b) where the plane direction is different from that of the substrate main surface (12a) and a GaN crystal can be grown; and a GaN layer (15) grown in the normal line direction of the substrate main surface (12a) by having a GaN crystal grown with the crystal growing surface (12b) of the substrate surface (12) on the sapphire substrate (11) as a starting point.
(FR)La présente invention concerne un substrat semi-conducteur qui est doté : d’un substrat en saphir (11), une surface de substrat (12) présentant une surface principale de substrat (12a) et une surface de croissance de cristaux (12b) où la direction du plan est différente de celle de la surface principale de substrat (12a) et où un cristal de GaN peut être mis à croître ; et d’une couche de GaN (15) mise à croître dans la direction de ligne normale de la surface principale du substrat (12a) par la croissance d’un cristal de GaN, la surface de croissance de cristaux (12b) de la surface du substrat (12) sur le substrat en saphir (11) formant le point de départ.
(JA) 半導体基板は、基板表面(12)が基板主面部分(12a)及び基板主面部分(12a)とは面方位が異なると共にGaNの結晶成長が可能な結晶成長面部分(12b)を有するサファイア基板(11)と、サファイア基板(11)の基板表面(12)における結晶成長面部分(12b)を起点としてGaNが結晶成長することにより基板主面部分(12a)の法線方向に成長して形成されたGaN層(15)とを備える。
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)