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1. WO2010005661 - EFFICIENT IN-BAND RELIABILITY WITH SEPARATE CYCLIC REDUNDANCY CODE FRAMES

Publication Number WO/2010/005661
Publication Date 14.01.2010
International Application No. PCT/US2009/046429
International Filing Date 05.06.2009
IPC
G06F 11/08 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
08Error detection or correction by redundancy in data representation, e.g. by using checking codes
G06F 11/10 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
08Error detection or correction by redundancy in data representation, e.g. by using checking codes
10Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
G06F 12/16 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
16Protection against loss of memory contents
CPC
G06F 11/1004
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
08Error detection or correction by redundancy in data representation, e.g. by using checking codes
10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
1004to protect a block of data words, e.g. CRC or checksum
Applicants
  • INTEL CORPORATION [US]/[US] (AllExceptUS)
  • BAINS, Kuljit, S. [IN]/[US] (UsOnly)
Inventors
  • BAINS, Kuljit, S.
Agents
  • VINCENT, Lester, J.
Priority Data
12/139,61016.06.2008US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) EFFICIENT IN-BAND RELIABILITY WITH SEPARATE CYCLIC REDUNDANCY CODE FRAMES
(FR) FIABILITÉ DANS LA BANDE EFFICACE AVEC TRAMES DE CODE DE REDONDANCE CYCLIQUE SÉPARÉES
Abstract
(EN)
Embodiments of the invention are generally directed to systems, methods, and apparatuses for efficient in-band reliability with separate cyclic redundancy code (CRC) frames. In some embodiments, a memory system uses data frames to transfer data between a host and a memory device. The system also uses a separate frame (e.g., a CRC frame) to transfer a CRC checksum that covers the data frames.
(FR)
Les modes de réalisation de l'invention concernent en général des systèmes, des procédés et des appareils pour une fiabilité dans la bande efficace avec des trames de code de redondance cyclique (CRC) séparées. Dans certains modes de réalisation, un système de mémoire utilise des trames de données pour transférer des données entre un hôte et un dispositif de mémoire. Le système utilise également une trame séparée (par exemple, une trame de CRC) pour transférer une somme de contrôle de CRC qui couvre les trames de données.
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