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1. WO2010001715 - WIRING FORMING METHOD

Publication Number WO/2010/001715
Publication Date 07.01.2010
International Application No. PCT/JP2009/060930
International Filing Date 16.06.2009
IPC
H01L 21/3205 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
H01L 21/288 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
283Deposition of conductive or insulating materials for electrodes
288from a liquid, e.g. electrolytic deposition
H01L 23/52 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
H01L 25/065 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/78
H01L 25/07 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
07the devices being of a type provided for in group H01L29/78
H01L 25/18 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
CPC
B41J 3/407
BPERFORMING OPERATIONS; TRANSPORTING
41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, ; e.g. INK-JET PRINTERS, THERMAL PRINTERS; , i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
3Typewriters or selective printing or marking mechanisms, ; e.g. ink-jet printers, thermal printers; characterised by the purpose for which they are constructed
407for marking on special material
B41J 3/4073
BPERFORMING OPERATIONS; TRANSPORTING
41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, ; e.g. INK-JET PRINTERS, THERMAL PRINTERS; , i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
3Typewriters or selective printing or marking mechanisms, ; e.g. ink-jet printers, thermal printers; characterised by the purpose for which they are constructed
407for marking on special material
4073Printing on three-dimensional objects not being in sheet or web form, e.g. spherical or cubic objects
H01L 2224/24011
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
18High density interconnect [HDI] connectors; Manufacturing methods related thereto
23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
24of an individual high density interconnect connector
2401Structure
24011Deposited, e.g. MCM-D type
H01L 2224/24145
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
18High density interconnect [HDI] connectors; Manufacturing methods related thereto
23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
24of an individual high density interconnect connector
241Disposition
24135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
24145the bodies being stacked
H01L 2224/24998
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
18High density interconnect [HDI] connectors; Manufacturing methods related thereto
23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
24of an individual high density interconnect connector
2499Auxiliary members for HDI interconnects, e.g. spacers, alignment aids
24996being formed on an item to be connected not being a semiconductor or solid-state body
24998Reinforcing structures, e.g. ramp-like support
H01L 2224/32145
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32135the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
32145the bodies being stacked
Applicants
  • コニカミノルタホールディングス株式会社 Konica Minolta Holdings, Inc. [JP]/[JP] (AllExceptUS)
  • 西 泰男 NISHI Yasuo [JP]/[JP] (UsOnly)
Inventors
  • 西 泰男 NISHI Yasuo
Priority Data
2008-17075330.06.2008JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) WIRING FORMING METHOD
(FR) PROCÉDÉ DE FORMATION DE CÂBLAGE
(JA) 配線形成方法
Abstract
(EN)
Size reduction and high integration of each of the laminated substrates are achieved, while forming an excellent wiring which electrically connects the substrates to each other.  A conductive ink, i.e., an ink (I), containing a conductive material is used, and in a state where a voltage is applied between a print head (2) and a substrate unit (10), an ink droplet (R) of the conductive ink is discharged from the print head (2), while relatively shifting the substrate unit (10) and the print head (2) substantially parallel to at least the upper surface of the substrate (11).  Thus, a conductive layer (12) which electrically connects electrodes (112) to each other between the substrates (11) is formed.
(FR)
La présente invention permet d’obtenir une diminution de taille et une intégration élevée de chacun des substrats stratifiés tout en formant un excellent câblage qui connecte électriquement les substrats les uns aux autres. Une encre conductrice, c’est-à-dire une encre (I), contenant un matériau conducteur est utilisée et dans un état dans lequel une tension est appliquée entre une tête d’impression (2) et une unité de substrat (10), une gouttelette d’encre (R) de l’encre conductrice est déchargée à partir de la tête d’impression (2), tout en décalant relativement l’unité de substrat (10) et la tête d’impression (2) de façon sensiblement parallèle au moins à la surface supérieure du substrat (11). De la sorte, il est possible de former une couche conductrice (12) qui connecte électriquement les électrodes (112) les unes aux autres entre les substrats (11).
(JA)
 積層された各基板を電気的に接続する良好な配線を形成しつつ、当該基板の小型化・高積層化を達成するために、インクIとして導電性材料が含有された導電性インクを用い、プリントヘッド2と基板ユニット10との間に電圧を印加した状態で、基板ユニット10とプリントヘッド2とを少なくとも基板11の上面に対し略平行に相対移動させつつ、プリントヘッド2から導電性インクのインク滴Rを吐出させて、基板11間で電極112を互いに電気的に接続させる導電層12を形成する。
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