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1. (WO2009131061) METHOD OF MANUFACTURING A SI(1-V-W-X)CWALXNV SUBSTRATE, METHOD OF MANUFACTURING AN EPITAXIAL WAFER, SI(1-V-W-X)CWALXNV SUBSTRATE, AND EPITAXIAL WAFER

Pub. No.:    WO/2009/131061    International Application No.:    PCT/JP2009/057719
Publication Date: Oct 29, 2009 International Filing Date: Apr 17, 2009
IPC: C30B 29/38
C23C 14/06
C30B 23/08
Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD.
住友電気工業株式会社
SATOH, Issei
佐藤 一成
MIYANAGA, Michimasa
宮永 倫正
FUJIWARA, Shinsuke
藤原 伸介
NAKAHATA, Hideaki
中幡 英章
Inventors: SATOH, Issei
佐藤 一成
MIYANAGA, Michimasa
宮永 倫正
FUJIWARA, Shinsuke
藤原 伸介
NAKAHATA, Hideaki
中幡 英章
Title: METHOD OF MANUFACTURING A SI(1-V-W-X)CWALXNV SUBSTRATE, METHOD OF MANUFACTURING AN EPITAXIAL WAFER, SI(1-V-W-X)CWALXNV SUBSTRATE, AND EPITAXIAL WAFER
Abstract:
Disclosed are a method of manufacturing a Si(1-v-w-x)CwAlxNv substrate that prevents the occurrence of cracks and is easy to process, a method of manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate and an epitaxial wafer. The method of manufacturing a Si(1-v-w-x)CwAlxNv substrate (10a) comprises the following processes: first, a Si substrate (11) is prepared; next, a Si(1-v-w-x)CwAlxNv layer (0