WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO2009127035) METHOD OF DERIVING AN INTEGRATED CIRCUIT SCHEMATIC DIAGRAM
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2009/127035    International Application No.:    PCT/CA2008/000734
Publication Date: 22.10.2009 International Filing Date: 18.04.2008
IPC:
G06F 17/50 (2006.01), G01R 31/303 (2006.01)
Applicants: SEMICONDUCTOR INSIGHTS INC. [CA/CA]; 3000 Solandt Road, Kanata, Ontario K2K 2X2 (CA) (For All Designated States Except US).
ZAVADSKY, Vyacheslav [CA/CA]; (CA) (For US Only).
KEYES, Edward [CA/CA]; (CA) (For US Only).
EDMONDS, Shane [CA/CA]; (CA) (For US Only).
NOVIKOV, Alexei [CA/CA]; (CA) (For US Only)
Inventors: ZAVADSKY, Vyacheslav; (CA).
KEYES, Edward; (CA).
EDMONDS, Shane; (CA).
NOVIKOV, Alexei; (CA)
Agent: SHAPIRO, Cohen; P.O. Box 13002, 349 Terry Fox Drive, Kanata, Ontario K2K 0E2 (CA)
Priority Data:
Title (EN) METHOD OF DERIVING AN INTEGRATED CIRCUIT SCHEMATIC DIAGRAM
(FR) PROCÉDÉ PERMETTANT D'ÉTABLIR UN SCHÉMA DE PRINCIPE DE CIRCUIT INTÉGRÉ
Abstract: front page image
(EN)A method, computer-readable medium and system are described for deriving a schematic diagram representative of an integrated circuit (1C) comprising a plurality of circuit elements. In general, the method, computer-readable medium and system are configured to receive as input a working schematic diagram identifying at least some of the circuit elements, and at least one existing schematic diagram from one or more libraries thereof. Based on this input, at least a portion of the working schematic diagram that matches at least a portion of the at least one existing schematic diagram is identified and replaced, thereby forming a revised schematic diagram.
(FR)L'invention porte sur un procédé, sur un support lisible par ordinateur et sur un système permettant d'établir un schéma de principe représentatif d'un circuit intégré (1C) comprenant une pluralité d'éléments de circuit. De façon générale, le procédé, le support lisible par ordinateur et le système sont configurés pour recevoir comme entrée un schéma de principe de travail identifiant au moins quelques éléments de circuit et au moins un schéma de principe existant d'une ou plusieurs de ses bibliothèques. Sur la base de cette entrée, au moins une partie du schéma de principe de travail qui correspond à au moins une partie du ou des schémas de principe existants est identifiée et remplacée, formant, de ce fait, un schéma de principe corrigé.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MT, NL, NO, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)