WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO2009060052) SRAM MEMORY CELL EQUIPPED WITH TRANSISTORS HAVING A VERTICAL MULTI-CHANNEL STRUCTURE
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2009/060052    International Application No.:    PCT/EP2008/065103
Publication Date: 14.05.2009 International Filing Date: 07.11.2008
IPC:
G11C 11/412 (2006.01), H01L 29/786 (2006.01)
Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES [FR/FR]; 25 rue Leblanc Bâtiment "Le Ponant D" F-75015 Paris (FR) (For All Designated States Except US).
THOMAS, Olivier [FR/FR]; (FR) (For US Only).
ERNST, Thomas [FR/FR]; (FR) (For US Only)
Inventors: THOMAS, Olivier; (FR).
ERNST, Thomas; (FR)
Agent: ILGART, Jean-Christophe; Brevalex 3, rue du Docteur Lancereaux F-75008 Paris (FR)
Priority Data:
07 58935 09.11.2007 FR
Title (EN) SRAM MEMORY CELL EQUIPPED WITH TRANSISTORS HAVING A VERTICAL MULTI-CHANNEL STRUCTURE
(FR) CELLULE MEMOIRE SRAM DOTEE DE TRANSISTORS A STRUCTURE MULTI-CANAUX VERTICALE
Abstract: front page image
(EN)The invention relates to a microelectronic device comprising, on a substrate, at least one element such as an SRAM memory cell composed of: one or more first transistor(s) respectively equipped with a number k (k ≥ 1) of parallel channels in a direction that makes a non-zero angle with the main plane of the substrate, one or more second transistor(s) equipped respectively with a number m, such that m > k, of parallel channels in a direction that makes a non-zero angle, preferably an orthogonal direction, with the main plane of the substrate.
(FR)L'invention concerne un dispositif microélectronique, comprenant, sur un substrat au moins un élément tel qu'une cellule de mémoire SRAM comportant : un ou plusieurs premier (s) transistor (s), doté (s) respectivement d'un nombre k (k ≥ 1) de canaux parallèles dans une direction réalisant un angle non-nul avec le plan principal du substrat, un ou plusieurs deuxième (s) transistor (s), doté (s) respectivement d'un nombre m, tel que m > k de canaux parallèles dans une direction réalisant un angle non-nul, de préférence une direction orthogonale, avec le plan principal du susbtrat.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MT, NL, NO, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: French (FR)
Filing Language: French (FR)