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1. WO2009004572 - SHUFFLED LDPC DECODING

Publication Number WO/2009/004572
Publication Date 08.01.2009
International Application No. PCT/IB2008/052635
International Filing Date 01.07.2008
IPC
H03M 13/11 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING, DECODING OR CODE CONVERSION, IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
05using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
11using multiple parity bits
CPC
H03M 13/1114
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
05using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
11using multiple parity bits
1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
1105Decoding
1111Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
1114Merged schedule message passing algorithm with storage of sums of check-to-bit node messages or sums of bit-to-check node messages, e.g. in order to increase the memory efficiency
H03M 13/1117
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
05using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
11using multiple parity bits
1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
1105Decoding
1111Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
1117using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
H03M 13/112
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
05using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
11using multiple parity bits
1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
1105Decoding
1111Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
1117using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
112with correction functions for the min-sum rule, e.g. using an offset or a scaling factor
H03M 13/1122
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
05using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
11using multiple parity bits
1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
1105Decoding
1111Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
1117using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
1122storing only the first and second minimum values per check node
H03M 13/1137
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
05using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
11using multiple parity bits
1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
1105Decoding
1131Scheduling of bit node or check node processing
1137Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
H03M 13/114
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
05using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
11using multiple parity bits
1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
1105Decoding
1131Scheduling of bit node or check node processing
114Shuffled, staggered, layered or turbo decoding schedules
Applicants
  • NXP B.V. [NL]/[NL] (AllExceptUS)
  • DIELISSEN, John [NL]/[NL] (UsOnly)
Inventors
  • DIELISSEN, John
Agents
  • BIRD, William, E.
Priority Data
07111728.704.07.2007EP
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SHUFFLED LDPC DECODING
(FR) DÉCODAGE LDPC BRASSÉ
Abstract
(EN)
An LDPC decoder iteratively decodes an LDPC code represented by a parity check matrix H consisting of a plurality of circulants based on a Log-Likelihood Ratio Belief-Propagation algorithm. First computation means (1010) compute for a next iteration symbol messages λϰm from a representation of a corresponding symbol value stored in a first memory 1005 and from check node messages &Lgr;mn from a previous iteration. A shuffler (1030) changes a sequence of the symbol message received from the first computation means (1010) in dependence on a position of the non-zero elements in a corresponding sub-matrix. Second computation means (DP-O, DP-I, DP-D-I) compute the check node messages in dependence on symbol messages received from the barrel shifter and store a representation of the computed check node message in a second memory (1015). Third computation means (1020) update the representation of the symbol values in the first memory in dependence on output of the first and second computing means. The principle of 'staggered' or 'shuffled' LDPC decoding is used. One embodiment is designed for multi-diagonal circulants.
(FR)
L'invention concerne un décodeur de contrôle de parité à faible densité (LDPC) qui décode de façon itérative un code LDPC représenté par une matrice de contrôle de parité H constituée d'une pluralité de circulants sur la base d'un algorithme de Propagation de Croyance de Logarithme du Rapport de Vraisemblance. Des premiers moyens de calcul (1010) calculent, pour une itération suivante, des messages de symbole λϰm à partir d'une représentation d'une valeur de symbole correspondante stockée dans une première mémoire 1005 et à partir de messages de nœud de contrôle &Lgr;mn provenant d'une itération précédente. Un dispositif de brassage (1030) modifie une séquence du message de symbole reçu en provenance des premiers moyens de calcul (1010) en fonction d'une position des éléments non nuls dans une sous-matrice correspondante. Des seconds moyens de calcul (DP-O, DP-I, DP-D-I) calculent les messages de nœud de contrôle en fonction de messages de symbole reçus en provenance du dispositif de décalage circulaire et stockent une représentation du message de nœud de contrôle calculé dans une seconde mémoire (1015). Des troisièmes moyens de calcul (1020) mettent à jour la représentation des valeurs de symbole dans la première mémoire en fonction d'une sortie des premiers et seconds moyens de calcul. Le principe de décodage LDPC « étagé » ou « brassé » est utilisé. Un mode de réalisation est conçu pour des circulants multidiagonaux.
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