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1. (WO2008123117) SOI SUBSTRATE AND METHOD FOR MANUFACTURING SOI SUBSTRATE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2008/123117 International Application No.: PCT/JP2008/055168
Publication Date: 16.10.2008 International Filing Date: 14.03.2008
IPC:
H01L 21/02 (2006.01) ,H01L 27/12 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
Applicants:
YAMAZAKI, Shunpei [JP/JP]; JP (UsOnly)
OHNUMA, Hideto; null (UsOnly)
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. [JP/JP]; 398, Hase, Atsugi-shi, Kanagawa 2430036, JP (AllExceptUS)
Inventors:
YAMAZAKI, Shunpei; JP
OHNUMA, Hideto; null
Priority Data:
2007-07976226.03.2007JP
Title (EN) SOI SUBSTRATE AND METHOD FOR MANUFACTURING SOI SUBSTRATE
(FR) SUBSTRAT SOI ET PROCÉDÉ DE RÉALISATION D'UN SUBSTRAT SOI
Abstract:
(EN) An SOI substrate and a manufacturing method of the SOI substrate, by which enlargement of the substrate is possible and its productivity can be increased, are provided. A step (A) of cutting a single crystal silicon substrate to form a single crystal silicon substrate which is n (n is an optional positive integer, n 1) times as large as a size of one shot of an exposure apparatus; a step (B) of forming an insulating layer on one surface of the single crystal silicon substrate, and forming an embrittlement layer in the single crystal substrate; and a step (C) of bonding a substrate having an insulating surface and the single crystal silicon substrate with the insulating layer therebetween, and conducting heat treatment to separate the single crystal silicon substrate along the embrittlement layer, and forming a single crystal silicon thin film on the substrate having an insulating surface are conducted.
(FR) La présente invention concerne un substrat SOI et un procédé de réalisation du substrat SOI, le procédé permettant l'élargissement du substrat et l'augmentation de la productivité. Le procédé comprend les opérations suivantes : (A) découpage d'un premier substrat de silicium monocristallin pour former un substrat de silicium monocristallin qui a une taille n (entier positif éventuel, n≥1) fois proportionnelle à celle d'une exposition faite au moyen d'un appareil d'exposition; (B) formation d'une couche isolante sur une surface du substrat de silicium monocristallin, et formation d'une couche de fragilisation dans le substrat de silicium monocristallin; et (C) liaison d'un substrat qui présente une surface isolante au substrat de silicium monocristallin, la couche isolante se trouvant interposée entre les deux, et mise en oeuvre d'un traitement thermique pour séparer le substrat de silicium monocristallin le long de la couche de fragilisation, et formation d'un film mince de silicium monocristallin sur le substrat présentant une surface isolante.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (EPO) (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MT, NL, NO, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)