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1. (WO2008097448) METHODS OF FORMING ONE OR MORE COVERED VOIDS IN A SEMICONDUCTOR SUBSTRATE, METHODS OF FORMING FIELD EFFECT TRANSISTORS, METHODS OF FORMING SEMICONDUCTOR-ON-INSULATOR SUBSTRATES, METHODS OF FORMING A SPAN COMPRISING SILICON DIOXIDE, METHODS OF COOLING SEMICONDUCTOR DEVICES, METHODS OF FORMING ELECTROMAGNETIC RADIATION EMITTE
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2008/097448    International Application No.:    PCT/US2008/001126
Publication Date: 14.08.2008 International Filing Date: 28.01.2008
IPC:
H01L 21/20 (2006.01)
Applicants: MICRON TECHNOLOGY, INC. [US/US]; (a Corporation Of The State Of Delaware), 8000 South Federal Way, Boise, ID 83716 (US) (For All Designated States Except US)
Inventors: WELLS, David, H.; (US)
Agent: MATKIN, Mark, S.; Wells St. John P.S., 601 West First Avenue, Suite 1300, Spokane, WA 99201-3828 (US)
Priority Data:
11/704,466 07.02.2007 US
Title (EN) METHODS OF FORMING ONE OR MORE COVERED VOIDS IN A SEMICONDUCTOR SUBSTRATE, METHODS OF FORMING FIELD EFFECT TRANSISTORS, METHODS OF FORMING SEMICONDUCTOR-ON-INSULATOR SUBSTRATES, METHODS OF FORMING A SPAN COMPRISING SILICON DIOXIDE, METHODS OF COOLING SEMICONDUCTOR DEVICES, METHODS OF FORMING ELECTROMAGNETIC RADIATION EMITTE
(FR) PROCÉDÉS DE FORMATION D'UN OU PLUSIEURS VIDES COUVERTS DANS UN SUBSTRAT SEMI-CONDUCTEUR, PROCÉDÉS DE FORMATION DE TRANSISTORS À EFFET DE CHAMP, PROCÉDÉS DE FORMATION DE SUBSTRAT SEMI-CONDUCTEUR SUR ISOLANT, PROCÉDÉS DE FORMATION D'UNE ÉTENDUE COMPRENANT DU DIOXY
Abstract: front page image
(EN)Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro- structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.
(FR)L'invention concerne des procédés pour former des vides dans des constructions à semi-conducteur. Dans certains modes de réalisation, les vides peuvent être utilisés comme microstructures pour la distribution d'agent de refroidissement, pour guider un rayonnement électromagnétique, ou pour la séparation et/ou caractérisation de matériaux. Certains modes de réalisation comprennent des constructions ayant des microstructures dans celles-ci, qui correspondent à des vides, des conduits, des structures isolantes, des structures à semi-conducteur ou des structures conductrices.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MT, NL, NO, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)