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1. WO2008043098 - SYSTEM AND METHOD FOR ON-CHIP IM3 REDUCTION OVER A BROAD RANGE OF OPERATING POWERS

Publication Number WO/2008/043098
Publication Date 10.04.2008
International Application No. PCT/US2007/080699
International Filing Date 08.10.2007
IPC
H03F 3/04 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
3Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
04with semiconductor devices only
CPC
H03F 1/0266
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
1Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
0205in transistor amplifiers
0261with control of the polarisation voltage or current, e.g. gliding Class A
0266by using a signal derived from the input signal
H03F 1/32
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
1Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
32Modifications of amplifiers to reduce non-linear distortion
H03F 2200/432
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
2200Indexing scheme relating to amplifiers
432Two or more amplifiers of different type are coupled in parallel at the input or output, e.g. a class D and a linear amplifier, a class B and a class A amplifier
H03F 3/19
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
3Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
189High frequency amplifiers, e.g. radio frequency amplifiers
19with semiconductor devices only
H03F 3/211
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
3Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
21with semiconductor devices only
211using a combination of several amplifiers
H03F 3/602
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
3Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
60Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
602Combinations of several amplifiers
Applicants
  • KRISHNAMURTHY, Vikram Bidare [US]/[US]
  • KHANIJOUN, Tanveer Kaur [US]/[US]
  • HERSHBERGER, Kyle Mark [US]/[US]
Inventors
  • KRISHNAMURTHY, Vikram Bidare
  • KHANIJOUN, Tanveer Kaur
  • HERSHBERGER, Kyle Mark
Agents
  • GLOBERMAN, Kyle, M.
Priority Data
60/850,14606.10.2006US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SYSTEM AND METHOD FOR ON-CHIP IM3 REDUCTION OVER A BROAD RANGE OF OPERATING POWERS
(FR) SYSTÈME ET PROCÉDÉ POUR UNE RÉDUCTION SUR PUCE D'INTERMODULATION DE TROISIÈME ORDRE SUR UNE LARGE PLAGE DE PUISSANCES DE FONCTIONNEMENT
Abstract
(EN)
Sets of power amplifier branches are power combined within each amplifier stage and each set of branches are biased in different classes of operation by bias circuits possessing different impedance characteristics such that the fundamental frequency components present at the output are in-phase with one another and the IMD3 components are anti-phase over a range of power levels. The RF input signal is provided by the output of the previous stage, each stage being formed by power combining sets of power amplifier branches each separately biased so the fundamental components are additive, while the IM3 components cancel partially or completely. Using a feed forward control loop to monitor the input power and appropriately adjusting the bias currents and impedance characteristics of the bias circuits feeding the individual branches can provide additional IM3 reduction or cancellation over a large range of output powers.
(FR)
Selon l'invention, des ensembles de branches d'amplificateurs de puissance sont combinés en puissance à l'intérieur de chaque étage amplificateur, et chaque ensemble de branches est polarisé en différentes classes de fonctionnement par des circuits de polarisation présentant des caractéristiques différentes d'impédance de sorte que les composantes de fréquences fondamentales présentes à la sortie soient en phase l'une avec l'autre et que les composantes de type de distorsion d'intermodulation de troisième ordre (IMD3) soient en opposition de phase sur une certaine plage de niveaux de puissances. Le signal d'entrée HF est appliqué par la sortie de l'étage précédent, chaque étage, étant formé en combinant en puissance des ensembles de branches d'amplificateurs de puissance, chacun étant polarisé séparément de sorte que les composantes fondamentales soient additives, alors que les composantes d'intermodulation de troisième ordre (IM3) s'annulent partiellement ou complètement. L'utilisation d'une boucle de commande de régulation par anticipation pour surveiller la puissance d'entrée et l'ajustement approprié des courants de polarisation et des caractéristiques d'impédance des circuits de polarisation alimentant les branches individuelles peuvent procurer une réduction voire une annulation de l'intermodulation de troisième ordre sur une grande plage de puissances de sortie.
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