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1. WO2007146601 - PREDICT COMPUTING PLATFORM MEMORY POWER UTILIZATION

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters

[ EN ]

[0060] CLAIMS:

What is claimed is:

j 1. A method comprising:
implementing at least one statistical prediction model to predict memory power utilization and reduce power consumption for a computing platform, implementation to include;
determining a configuration parameter for the computing platform;
o monitoring an operating parameter for the computing platform; and
predicting memory power utilization for the computing platform based on the determined configuration parameter and the monitored operating parameter; and
transitioning at least one memory module resident on the computing platform to s one of a plurality of power states based at least in part on memory power utilization predicted via the implementation of the at least one statistical prediction model.

2. A method according to claim 1, wherein the at least one statistical prediction model includes using a statistical parameter in a prediction algorithm that is determined during a given period of time that begins as the computing platform is initially powered-0 up.

3. A method according to claim 1, wherein the at least one statistical prediction model includes using a statistical parameter in a prediction algorithm that is determined during a given period of time and tuned periodically during runtime of the computing platform.

4. A method according to claim 3, wherein the statistical parameter is to include at least one statistical parameter selected from the following group of: memory requests j made to a memory controller for the at least one memory module, processing element utilization for a processing element on the computing platform, power state of a processing element on the computing platform, memory capacity utilization for a processing element on the computing platform and network bandwidth on at least one communication link between the computing platform and a network.

o 5. A method according to claim 3, wherein the power state of the processing element includes one of a suspend power state, a standby power state and a deep sleep power state.

6. A method according to claim 1, wherein determining the configuration parameter comprises obtaining the configuration parameter from a memory controller for the at least one memory module, the configuration parameter to include at least one usage
s configuration for the at least one memory module selected from the following group of: memory interleaving, memory mirroring, memory sparing and rank order allocation.

7. A method according to claim 6, wherein monitoring the operating parameter comprises monitoring the operating parameter by obtaining information from at least one memory register at one of a processing element, the memory controller, a network
0 interface and the at least one memory module.

8. A method according to claim 7, wherein obtaining information from the at least one memory register at the processing element comprises the information to include at least one selected from the following group of: processing element utilization, processing element performance and a processing element power state.

j 9. A method according to claim 1 , wherein transitioning the at least one memory module to one of the plurality of power states comprises the power states to include an offline state, an online state, a standby state and a suspend state.

10. A method according to claim 9, wherein the at least one memory module is a fully buffered dual inline memory module (FB-DIMM).

o 11. An apparatus comprising:
a memory power utilization manager to include logic to implement at least one statistical prediction model to predict memory power utilization for a computing platform, implementation to include the logic to;
determine a configuration parameter for the computing platform;
s monitor an operating parameter for the computing platform; and
predict memory power utilization for the computing platform based on the determined configuration parameter and the monitored operating parameter,
wherein the memory power utilization manager indicates the predicted memory
power utilization to a memory controller resident on the computing platform for 0 the memory controller to transition at least one memory module resident on the
computing platform to one of a plurality of power states based at least in part on
the indicated prediction of memory power utilization for the computing platform.

12. An apparatus according to claim 11, wherein to determine the configuration parameter comprises the logic to obtain the configuration parameter from the memory controller, the configuration parameter to include at least one usage configuration for the at least one memory module selected from the following group of: memory interleaving, j memory mirroring, memory sparing and rank order allocation.

13. An apparatus according to claim 12, wherein to monitor the operating parameter comprises the logic to monitor the operating parameter by obtaining information from at least one memory register at one of a processing element, the memory controller, a network interface and the at least one memory module.

o 14. An apparatus according to claim 13, wherein to obtain information from the at least one memory register at the memory controller comprises the information to include memory access patterns for the memory controller, the memory access patterns to include the number of read and write requests the memory controller completes for the computing platform for a given period of time.

s 15. An apparatus according to claim 13, wherein the memory power utilization manager comprises the memory power utilization manager hosted on a dedicated management microcontroller resident on the computing platform.

16. An apparatus according to claim 13, wherein the memory power utilization manager comprises the memory power utilization manager hosted on the memory 0 controller.

17. An apparatus according to claim 13, wherein the memory power utilization manager comprises at least part of a service operating system running on one of a dedicated sequestered core or a portion of a core for a processing element that operates using virtualization technology.

j 18. A computing platform comprising:
a processing element;
a plurality of memory modules;
a memory controller for the memory modules;
a network interface to receive and forward data; and
o a memory power utilization manager to include logic to implement one or more statistical prediction models to predict memory power utilization for the computing platform, implementation to include the logic to;
determine a configuration parameter for the computing platform;
monitor an operating parameter for the computing platform; and s predict memory power utilization for the computing platform based on the determined configuration parameter and the monitored operating parameter,
wherein the memory power utilization manager indicates the predicted memory
power utilization to the memory controller for the memory controller to transition a memory module of the memory modules to one of a plurality of power states based 0 at least in part on the indicated prediction of memory power utilization for the
computing platform.

19. A computing platform according to claim 18, wherein to determine the configuration parameter comprises the logic to obtain the configuration parameter from the memory controller, the configuration parameter to include at least one usage configuration for the plurality of memory modules selected from the following group of: j memory interleaving, memory mirroring, memory sparing and rank order allocation.

20. A computing platform according to claim 19, wherein to monitor the operating parameter comprises the logic to monitor the operating parameter by obtaining information from at least one memory register at one of the processing element, the memory controller, the network interface and the memory modules.

o 21. A computing platform according to claim 20, wherein to obtain information from the at least one memory register at the network interface comprises the information to include network traffic statistics for packet-based data received from and forwarded to a network coupled to the computing platform through the network interface.

22. A machine-accessible medium comprising content, which, when executed by a s machine resident on a computing platform causes the machine to:
implement at least one statistical prediction model to predict memory power utilization and reduce power consumption for a computing platform, implementation to include;
determining a configuration parameter for the computing platform;
0 monitoring an operating parameter for the computing platform; and
predicting memory power utilization for the computing platform based on the determined configuration parameter and the monitored operating parameter;

and
transition at least one memory module resident on the computing platform to one of a plurality of power states based at least in part on memory power utilization predicted via the implementation of the at least one statistical prediction model.

j 23. A machine-accessible medium according to claim 22, wherein determining the configuration parameter comprises obtaining the configuration parameter from a memory controller for the at least one memory module, the configuration parameter to include at least one usage configuration for the at least one memory module selected from the following group of: memory interleaving, memory mirroring, memory sparing and rank o order allocation.

24. A machine-accessible medium according to claim 23, wherein monitoring the operating parameter comprises monitoring the operating parameter by obtaining information from at least one memory register at one of a processing element, the memory controller, a network interface and the at least one memory module.

s 25. A machine-accessible medium according to claim 24, wherein obtaining information from the at least one memory register at the processing element comprises the information to include at least one selected from the following group of: processing element utilization, processing element performance and a processing element power state