Processing

Please wait...

PATENTSCOPE will be unavailable a few hours for maintenance reason on Saturday 31.10.2020 at 7:00 AM CET
Settings

Settings

Goto Application

1. WO2007146570 - BLENDING MULTIPLE DISPLAY LAYERS

Publication Number WO/2007/146570
Publication Date 21.12.2007
International Application No. PCT/US2007/069561
International Filing Date 23.05.2007
IPC
G09G 5/397 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
39Control of the bit-mapped memory
395Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
397Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay
CPC
G09G 2340/125
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2340Aspects of display data processing
12Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels
125wherein one of the images is motion video
G09G 2360/122
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2360Aspects of the architecture of display systems
12Frame memory handling
122Tiling
G09G 5/397
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
39Control of the bit-mapped memory
395Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
397Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay
Applicants
  • QUALCOMM INCORPORATED [US]/[US] (AllExceptUS)
  • KING, Scott Howard [US]/[US] (UsOnly)
  • JALIL, Suhail [IN]/[US] (UsOnly)
  • LIANG, Yi [CN]/[US] (UsOnly)
Inventors
  • KING, Scott Howard
  • JALIL, Suhail
  • LIANG, Yi
Agents
  • OGROD, Gregory D.
Priority Data
11/450,62108.06.2006US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) BLENDING MULTIPLE DISPLAY LAYERS
(FR) mélange de couches d'affichage multiples
Abstract
(EN)
Image processing techniques are described that reduce the amount of bandwidth required to read an image from memory for display. According to the techniques, a processor stores low change rate display layers in a memory such that a processor can read the display layers from the memory using a reduced amount of processing resources. An overlay module blends low change rate display layers into a combined overlay layer. A processor reads the overlay layer from the memory and selectively processes the overlay layer based on processing information for the overlay layer recorded in memory. The processor then blends the overlay layer and a high change rate video display layer to update a single image for display according to a high change rate. In addition, the overlay module updates the overlay layer based on the low change rate display layers according to a low change rate.
(FR)
L'invention concerne des techniques de traitement d'image qui diminuent la quantité de bande passante nécessaire pour lire une image depuis la mémoire pour l'affichage. Selon les techniques, un processeur stocke des couches d'affichage à taux de modification faible dans une mémoire de telle sorte qu'un processeur peut lire les couches d'affichage depuis la mémoire à l'aide d'une quantité réduite de ressources de traitement. Un module de recouvrement mélange des couches d'affichage à taux de modification faible pour obtenir une couche de recouvrement combinée. Un processeur lit la couche de recouvrement depuis la mémoire et traite sélectivement la couche de recouvrement sur la base des informations de traitement pour la couche de recouvrement enregistrée en mémoire. Le processeur mélange ensuite la couche de recouvrement et une couche d'affichage vidéo à taux de modification élevé pour mettre à jour une image unique pour l'affichage selon un taux de modification élevé. De plus, le module de recouvrement met à jour la couche de recouvrement sur la base des couches d'affichage à taux de modification faible selon un taux de modification faible.
Latest bibliographic data on file with the International Bureau