Processing

Please wait...

Settings

Settings

Goto Application

1. WO2007145843 - BIDIRECTIONAL BUFFER WITH SLEW RATE CONTROL AND METHOD OF BIDIRECTIONALLY TRANSMITTING SIGNALS WITH SLEW RATE CONTROL

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters

[ EN ]
Amended Claims

received by the International Bureau on 14 April 2008 (14.04.2008)

Originally filed claims 1-14 unchanged. Claims 15-16 added.

1. (Original) A bidirectional buffer provided on an integrated circuit that provides slew rate control for a forward signal along with external resistive and capacitive elements comprising: a first node that functions as an input node for a forward signal and an output node for a reverse signal;

a second node that functions as an output node for a forward signal and an input node for a reverse signal;

a signal line disposed between the first and second node, with a pass transistor disposed thereon;

a first circuit that provides impedance control to the forward signal when input onto the first node, the first circuit coupled to the first node and to at least one of the resistive elements; a second circuit that provides slew rate control of the forward signal output onto the second node, the second circuit coupled to the second node and to at least another one of the resistive elements and to the capacitive element

2. (Original) The bidirectional buffer according to claim 1 wherein a slew rate control input is not provided,

3. (Original) The bidirectional buffer according to claim 1 wherein the first circuit includes a capacitor, a bias circuit, and a plurality of transistors that are coupled between the first node and a gate of the pass transistor.

4. The bidirectional buffer according to claim 3 wherein the bias circuit includes a current mirror.

5. (Original) The bidirectional buffer according to claim 1 wherein the second circuit includes a pull-down circuit, a pull-up circuit, and a current source circuit.

6. (Original) The bidirectional buffer according to claim 5 wherein the pull-down circuit includes a pull-down transistor, a first capacitor, and a plurality of resistors that are coupled to the second node.

7. (Original) The bidirectional buffer according to claim 6 wherein the pull-up circuit includes a pull-up transistor, a first capacitor, and a plurality of resistors that are coupled to the second node.

8. (Original) The bidirectional buffer according to claim 7 wherein the current source circuit biases the second node by a ratio of at least 5:1.

9. (Original) The bidirectional buffer according to claim 7 wherein a value of the current source is set by the HDMI specification.

10. (Original) The bidirectional buffer according to claim 5 wherein the current source circuit biases the second node by a ratio of at least 5:1.

11. (Original) The bidirectional buffer according to claim 5 wherein a value of the current source is set by the HDMI specification.

12. (Original) The bidirectional buffer according to claim 1 wherein the first circuit and the second circuit are substantially turned off and the pass transistor is turned on during a period when there exists the reverse signal,

13. (Original) A method of providing signal transmission through a bus on a buffer comprising the steps of:

providing for a slew rate controlled forward signal through the bus on the buffer in a first direction, the slew rate controlled forward signal being provided without usage of any external control signal; and

providing for a reverse signal through the bus on the buffer in a second direction, the second direction being opposite the first direction, thereby resulting in a bi-directional bus with slew rate control in at least one direction,

14. (Original) The method according to claim 13 wherein transitions of the forward signal are either pulled-up or pulled-down to decrease a period of the transitions.

15. (New) A method according to claim 13 or 14 and further comprising providing for impedance control of the forward signal in the first direction, wherein transitions of the forward signal are either pulled-up or pulled-down to decrease a period of the transitions.

16. (New) A method according to claim 15, wherein providing the impedance control includes controlling the gate of a pass transistor disposed in the path of the forward signal.