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1. WO2007142138 - MRAM USING 2T2MTJ CELL

Publication Number WO/2007/142138
Publication Date 13.12.2007
International Application No. PCT/JP2007/061189
International Filing Date 01.06.2007
IPC
G11C 11/15 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
02using magnetic elements
14using thin-film elements
15using multiple magnetic layers
H01L 21/8246 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology
8239Memory structures
8246Read-only memory structures (ROM)
H01L 27/105 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
H01L 43/08 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
43Devices using galvano-magnetic or similar magnetic effects; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
08Magnetic-field-controlled resistors
CPC
G11C 11/1655
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
02using magnetic elements
16using elements in which the storage effect is based on magnetic spin effect
165Auxiliary circuits
1653Address circuits or decoders
1655Bit-line or column circuits
G11C 11/1657
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
02using magnetic elements
16using elements in which the storage effect is based on magnetic spin effect
165Auxiliary circuits
1653Address circuits or decoders
1657Word-line or row circuits
G11C 11/1659
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
02using magnetic elements
16using elements in which the storage effect is based on magnetic spin effect
165Auxiliary circuits
1659Cell access
G11C 11/1673
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
02using magnetic elements
16using elements in which the storage effect is based on magnetic spin effect
165Auxiliary circuits
1673Reading or sensing circuits or methods
G11C 11/1675
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
02using magnetic elements
16using elements in which the storage effect is based on magnetic spin effect
165Auxiliary circuits
1675Writing or programming circuits or methods
H01L 27/228
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
22including components using galvano-magnetic effects, e.g. Hall effects; using similar magnetic field effects
222Magnetic non-volatile memory structures, e.g. MRAM
226comprising multi-terminal components, e.g. transistors
228of the field-effect transistor type
Applicants
  • 日本電気株式会社 NEC CORPORATION [JP]/[JP] (AllExceptUS)
  • 崎村 昇 SAKIMURA, Noboru [JP]/[JP] (UsOnly)
  • 本田 雄士 HONDA, Takeshi [JP]/[JP] (UsOnly)
  • 杉林 直彦 SUGIBAYASHI, Tadahiko [JP]/[JP] (UsOnly)
Inventors
  • 崎村 昇 SAKIMURA, Noboru
  • 本田 雄士 HONDA, Takeshi
  • 杉林 直彦 SUGIBAYASHI, Tadahiko
Agents
  • 工藤 実 KUDOH, Minoru
Priority Data
2006-15935308.06.2006JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) MRAM USING 2T2MTJ CELL
(FR) MRAM UTILISANT UNE CELLULE 2T2MTJ
(JA) 2T2MTJセルを用いたMRAM
Abstract
(EN)
A magnetic random access memory comprises a plurality of first wires and a plurality of second wires extending in a first direction; a plurality of third wires and a plurality of fourth wires extending in a second direction; and a plurality of memory cells placed at intersections between the plurality of first wires and the plurality of third wires. The plurality of memory cells each comprise first and second transistors that are connected in series between the first and second wires and controlled by a signal of the third wire; a first magnetic resistor element one end of which is connected to a write wire connecting the first transistor to the second transistor and the other end of which is grounded; and a second magnetic resistor element one end of which is connected to the write wire and the other end of which is connected to the fourth wire.
(FR)
L'invention concerne une mémoire magnétique à accès aléatoire qui comprend plusieurs premiers fils et plusieurs deuxièmes fils s'étendant dans une première direction; plusieurs troisièmes fils et plusieurs quatrièmes fils s'étendant dans une seconde direction; et plusieurs cellules de mémoire placées aux intersections des premiers et des troisièmes fils. Chacune des cellules de mémoire comprend des premier et second transistors reliés en série entre les premiers et deuxièmes fils et commandés par un signal du troisième fil; un premier élément de résistance magnétique dont une extrémité est reliée à un fil d'écriture reliant le premier transistor au second et dont l'autre extrémité est mise à la terre; et un second élément de résistance magnétique dont une extrémité est reliée à un fil d'écriture et l'autre à un quatrième fil.
(JA)
 本発明による磁気ランダムアクセスメモリは、第1方向へ延在する複数の第1配線及び複数の第2配線と、第2方向へ延在する複数の第3配線及び複数の第4配線と、前記複数の第1配線と前記複数の第3配線との交点の各々に対応して設けられた複数のメモリセルとを具備する。前記複数のメモリセルの各々は、前記第1配線と前記第2配線との間に直列に接続され、前記第3配線の信号で制御される第1トランジスタ及び第2トランジスタと、一端を前記第1トランジスタと前記第2トランジスタとをつなぐ書き込み配線に、他端を接地に接続された第1磁気抵抗素子と、一端を前記書き込み配線に、他端を前記第4配線に接続された第2磁気抵抗素子とを含む。
Also published as
Latest bibliographic data on file with the International Bureau