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1. WO2007097712 - METHOD AND APPARATUS FOR CASCADE MEMORY

Publication Number WO/2007/097712
Publication Date 30.08.2007
International Application No. PCT/SG2006/000235
International Filing Date 17.08.2006
Chapter 2 Demand Filed 08.08.2007
IPC
G11C 7/00 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
G11C 8/00 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
8Arrangements for selecting an address in a digital store
CPC
G11C 5/04
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
5Details of stores covered by G11C11/00
02Disposition of storage elements, e.g. in the form of a matrix array
04Supports for storage elements ; , e.g. memory modules; Mounting or fixing of storage elements on such supports
Applicants
  • TREK 2000 INTERNATIONAL LTD [SG]/[SG] (AllExceptUS)
  • POO, Teng Pin [MY]/[SG] (UsOnly)
Inventors
  • POO, Teng Pin
Agents
  • ALBAN TAY MAHTANI & DE SILVA
Priority Data
200601251-227.02.2006SG
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) METHOD AND APPARATUS FOR CASCADE MEMORY
(FR) PROCÉDÉ ET DISPOSITIF POUR MÉMOIRE EN CASCADE
Abstract
(EN)
A memory device having a memory cell and a memory controller operatively connected to the memory cell. A cascade circuit is provided for enabling a subsequent memory device in a cascade of memory devices. The cascade circuit is operatively connected to the memory controller. A corresponding method is also disclosed.
(FR)
L'invention concerne un dispositif de mémoire comportant une cellule de mémoire et un organe de commande de mémoire connecté exploitable à la cellule de mémoire. Un circuit en cascade sert à activer le dispositif de mémoire subséquent dans une cascade de dispositifs de mémoire. Le circuit en cascade est connecté exploitable à l'organe de commande de mémoire. Un procédé correspondant est également décrit.
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