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Machine translation
1. (WO2007094110) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2007/094110    International Application No.:    PCT/JP2006/323437
Publication Date: 23.08.2007 International Filing Date: 24.11.2006
IPC:
H01L 29/78 (2006.01), H01L 21/28 (2006.01), H01L 21/336 (2006.01), H01L 21/8238 (2006.01), H01L 27/092 (2006.01), H01L 29/423 (2006.01), H01L 29/49 (2006.01)
Applicants: NEC CORPORATION [JP/JP]; 7-1, Shiba 5-chome, Minato-ku, Tokyo 1088001 (JP) (For All Designated States Except US).
MANABE, Kenzo [JP/JP]; (JP) (For US Only)
Inventors: MANABE, Kenzo; (JP)
Agent: MIYAZAKI, Teruo; 8th Floor, 16th Kowa Bldg. 9-20, Akasaka 1-chome Minato-ku, Tokyo 107-0052 (JP)
Priority Data:
2006-036669 14.02.2006 JP
2006-256953 22.09.2006 JP
Title (EN) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
(FR) DISPOSITIF SEMI-CONDUCTEUR ET SON PROCÉDÉ DE FABRICATION
(JA) 半導体装置およびその製造方法
Abstract: front page image
(EN)This invention provides a semiconductor device comprising a silicon substrate, a gate insulating film provided on the silicon substrate, a gate electrode provided on the gate insulating film, and a field effect transistor having a source/drain region. A crystallized Ni silicide region containing an impurity element of a conductivity type which is opposite to the conductivity type of the field effect transistor in its channel region, is provided in the gate electrode in its part in contact with the gate insulating film.
(FR)La présente invention concerne un dispositif semi-conducteur comprenant un substrat de silicium, une pellicule d'isolation de gâchette disposée sur le substrat de silicium, une électrode de gâchette disposée sur la pellicule d'isolation de gâchette et un transistor à effet de champ comportant une zone de source/drain. Une zone de siliciure de Ni cristallisé contenant un élément d'impureté d'un type de conductivité opposé au type de conductivité du transistor à effet de champ dans sa zone de canal, est prévue dans la partie de l'électrode de gâchette en contact avec la pellicule d'isolation de gâchette.
(JA) シリコン基板と、このシリコン基板上のゲート絶縁膜と、このゲート絶縁膜上のゲート電極と、ソース・ドレイン領域を有する電界効果トランジスタを有する半導体装置であって、ゲート電極は、ゲート絶縁膜に接する部分に、当該電界効果トランジスタのチャネル領域の導電型と反対の導電型の不純物元素を含む結晶化Niシリサイド領域を有する半導体装置。
Designated States: AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MD, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, SV, SY, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HU, IE, IS, IT, LT, LU, LV, MC, NL, PL, PT, RO, SE, SI, SK, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)