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1. WO2007092762 - SEMICONDUCTOR DEVICE WITH IMPROVED SOLDER JOINT

Publication Number WO/2007/092762
Publication Date 16.08.2007
International Application No. PCT/US2007/061532
International Filing Date 02.02.2007
IPC
H01L 29/40 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40Electrodes
CPC
B23K 35/262
BPERFORMING OPERATIONS; TRANSPORTING
23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
35Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
22characterised by the composition or nature of the material
24Selection of soldering or welding materials proper
26with the principal constituent melting at less than 400 degrees C
262Sn as the principal constituent
H01L 2224/0401
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
H01L 2224/05082
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
05001Internal layers
05075Plural internal layers
0508being stacked
05082Two-layer arrangements
H01L 2224/05147
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
05001Internal layers
05099Material
051with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
05138the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
05147Copper [Cu] as principal constituent
H01L 2224/05155
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
05001Internal layers
05099Material
051with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
05138the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
05155Nickel [Ni] as principal constituent
H01L 2224/0558
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
05575Plural external layers
0558being stacked
Applicants
  • TEXAS INSTRUMENTS INCORPORATED [US]/[US] (AllExceptUS)
  • AMAGAI, Masazumi [JP]/[JP] (UsOnly)
Inventors
  • AMAGAI, Masazumi
Agents
  • TUNG, Yingsheng
Priority Data
11/346,72803.02.2006US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE WITH IMPROVED SOLDER JOINT
(FR) dispositif semi-conducteur avec joint a brasure tendre ameliore
Abstract
(EN)
A semiconductor device with an improved solder joint system is described. The solder system includes two copper contact pads connected by a body of solder (120) and the solder is an alloy including tin, silver, and at least one metal from the transition groups IIIA, IVA, VA, VIA, VIIA, and VIIIA of the Periodic Table of the Elements. The solder joint system also includes, between the pads and the solder, layers of intermetallic compounds, which include grains of copper and tin compounds and copper, silver, and tin compounds. The compounds contain the transition metals. The inclusion of the transition metals in the compound grains reduce the compound grains size and prevent grain size increases after the solder joint undergoes repeated solid/liquid/solid cycles.
(FR)
La présente invention concerne un dispositif semi-conducteur avec un système de joint à brasure tendre amélioré. Ledit système comprend deux plots de contact en cuivre connectés par un corps de brasure tendre (120) et la brasure tendre est un alliage comprenant l'étain, l'argent et au moins un métal provenant des groupes de transition IIIA, IVA, VA, VIA, VIIA et VIIIA du tableau périodique des éléments. Ledit système comprend également, entre les plots et la brasure, des couches de composés intermétalliques qui comprennent des grains de composés de cuivre et d'étain, et de composés de cuivre, d'argent et d'étain. Les composés contiennent les métaux de transition. L'inclusion des métaux de transition dans les grains des composés réduit la taille des grains des composés et évite son augmentation après que le joint à brasure tendre a subi des cycles solide/liquide/solide répétés.
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