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1. WO2007092067 - HIGH-SPEED RECEIVER ARCHITECTURE

Publication Number WO/2007/092067
Publication Date 16.08.2007
International Application No. PCT/US2006/044679
International Filing Date 15.11.2006
IPC
H03H 7/30 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
7Multiple-port networks comprising only passive electrical elements as network components
30Time-delay networks
H03H 7/40 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
7Multiple-port networks comprising only passive electrical elements as network components
38Impedance-matching networks
40Automatic matching of load impedance to source impedance
H03K 5/159 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
5Manipulation of pulses not covered by one of the other main groups of this subclass
159Applications of delay lines not covered by the preceding subgroups
H03K 9/00 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
9Demodulating pulses which have been modulated with a continuously-variable signal
H04L 27/00 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
27Modulated-carrier systems
H04L 27/06 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
27Modulated-carrier systems
02Amplitude-modulated carrier systems, e.g. using on/off keying; Single sideband or vestigial sideband modulation
06Demodulator circuits; Receiver circuits
CPC
H03M 1/0626
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
1Analogue/digital conversion; Digital/analogue conversion
06Continuously compensating for, or preventing, undesired influence of physical parameters
0617characterised by the use of methods or means not specific to a particular type of detrimental influence
0626by filtering
H03M 1/1004
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
1Analogue/digital conversion; Digital/analogue conversion
10Calibration or testing
1004without interrupting normal operation, e.g. by providing an additional component for temporarily replacing components to be tested or calibrated
H03M 1/1215
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
1Analogue/digital conversion; Digital/analogue conversion
12Analogue/digital converters
1205Multiplexed conversion systems
121Interleaved, i.e. using multiple converters or converter parts for one channel
1215using time-division multiplexing
H03M 1/44
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
1Analogue/digital conversion; Digital/analogue conversion
12Analogue/digital converters
34Analogue value compared with reference values
38sequentially only, e.g. successive approximation type
44Sequential comparisons in series-connected stages with change in value of analogue signal
H04B 10/6971
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
BTRANSMISSION
10Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
60Receivers
66Non-coherent receivers, e.g. using direct detection
69Electrical arrangements in the receiver
697Arrangements for reducing noise and distortion
6971using equalisation
H04L 1/0054
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
1Arrangements for detecting or preventing errors in the information received
004by using forward error control
0045Arrangements at the receiver end
0054Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
Applicants
  • CLARIPHY COMMUNICATIONS, INC. [US]/[US] (AllExceptUS)
  • AGAZZI, Oscar, Ernesto [AR]/[US] (UsOnly)
  • CRIVELLI, Diego, Ernesto [AR]/[AR] (UsOnly)
  • CARRER, Hugo, Santiago [AR]/[AR] (UsOnly)
  • HUEDA, Mario, Rafael [AR]/[AR] (UsOnly)
  • LUNA, German Cesar, Augusto [AR]/[AR] (UsOnly)
  • GRACE, Carl [US]/[US] (UsOnly)
Inventors
  • AGAZZI, Oscar, Ernesto
  • CRIVELLI, Diego, Ernesto
  • CARRER, Hugo, Santiago
  • HUEDA, Mario, Rafael
  • LUNA, German Cesar, Augusto
  • GRACE, Carl
Agents
  • FARN, Michael, W.
Priority Data
11/538,02502.10.2006US
11/551,70120.10.2006US
11/559,85014.11.2006US
60/737,10315.11.2005US
60/764,86602.02.2006US
60/779,20003.03.2006US
60/783,34416.03.2006US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) HIGH-SPEED RECEIVER ARCHITECTURE
(FR) ARCHITECTURE DE RÉCEPTEUR À GRANDE VITESSE
Abstract
(EN)
A receiver (e.g., for a 1OG fiber communications link) includes an interleaved ADC coupled to a multi-channel equalizer that can provide different equalization for different ADC channels within the interleaved ADC. That is, the multi-channel equalizer can compensate for channel-dependent impairments. In one approach, the multi-channel equalizer is a feedforward equalizer (FFE) coupled to a Viterbi decoder, for example a sliding block Viterbi decoder (SBVD); and the FFE and/or the channel estimator for the Viterbi decoder are adapted using the LMS algorithm.
(FR)
L'invention porte sur un récepteur (par exemple de liaison par fibre à 10 G), comporte un CA/C entrelacé couplé à un égaliseur multicanal pouvant effectuer différentes égalisations pour différents canaux CA/C entrelacés. C.-à-d. que ledit égaliseur peut compenser les mésappariements dépendant des canaux. Dans une variante, l'égaliseur, du type à précompensation (FFE), est couplé à un décodeur Viterbi, par exemple à un décodeur Viterbi à bloc coulissant, et le FFE et/ou son estimateur sont adaptés à l'utilisation de l'algorithme.
Also published as
Latest bibliographic data on file with the International Bureau